cy62127dv18 Cypress Semiconductor Corporation., cy62127dv18 Datasheet

cy62127dv18

Manufacturer Part Number

cy62127dv18

Description

1m 64k X 16 Static Ram Semiconductor

Manufacturer

Cypress Semiconductor Corporation.

Datasheet

1.CY62127DV18.pdf (13 pages)

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Cypress Semiconductor Corporation

Document #:

Features

Functional Description

The CY62127DV18 is a high-performance CMOS static RAM

organized as 64K words by 16 bits. This device

vanced circuit design to provide ultra-low active current. This

is ideal for providing More Battery Life

applications such as cellular telephones.

an automatic power-down feature that significantly reduces

power consumption by

The device can be put into standby mode reducing power con-

sumption by more than 99% when deselected

(CE

Note:

1. For best-practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.

• Very

•

• Ultra-low active power

• Ultra-low standby power

• Easy memory expansion with

• Automatic power-down when deselected

• CMOS for optimum speed/power

• Packages offered in a 48-ball FBGA and a 44-pin TSOP

Voltage range: 1.65V to 1.95V

Type II

— Typical active current:

Logic Block Diagram

) HIGH or Chip Enable 2 (CE

high speed:

38-05226

55 ns

99%

Rev.

when addresses are not toggling.

[1]

0.5

2.5

Power-down

Circuit

COLUMN DECODER

mA @ f = 1 MHz

mA @ f = f

DATA IN DRIVERS

) LOW

2048 x 32 x 16

, CE

RAM ARRAY

64K × 16

(MoBL

The device

•

or both BHE

and OE features

MAX

3901 North First Street

Chip Enable 1

features ad-

) in portable

also has

and

INFORMATION

ADVANCE

BLE are HIGH. The input/output pins

placed in a high-impedance state when: deselected

able 1 (CE

disabled (OE HIGH),

Enable are disabled

ation

HIGH and WE LOW).

Writing to the device is accomplished by taking Chip Enable 1

(CE

(WE) input LOW. If Byte Low Enable (BLE) is LOW, then data

from I/O pins (I/O

specified on the

Enable (BHE) is LOW, then data from I/O pins (I/O

I/O

Reading from the device is accomplished by taking Chip En-

able 1 (CE

Enable (OE) LOW while forcing the Write Enable (WE) HIGH.

If Byte Low Enable (BLE) is LOW, then data from the memory

location specified by the address pins will appear on I/O

I/O

ory will appear on I/O

of this data sheet for a complete description of read and write

modes.

BHE

BLE

through A

. If Byte High Enable (BHE) is LOW, then data from mem-

) LOW and Chip Enable 2 (CE

) is written into the location specified on the address pins

(Chip Enable 1 (CE

•

1M (64K

San Jose

) LOW and Chip Enable 2 (CE

) HIGH or Chip Enable 2 (CE

I/O

address pins (A

–I/O

through I/O

(BHE, BLE HIGH) or during a write oper-

BHE

BLE

both Byte High Enable and Byte Low

to I/O

•

) LOW and Chip Enable 2 (CE

x 16) Static RAM

CA 95134

. See the truth table at the back

Revised September 24, 2002

), is written into the location

through A

CY62127DV18

) HIGH and Write Enable

(I/O

) LOW, outputs are

•

) HIGH and Output

through I/O

408-943-2600

MoBL2

). If Byte High

Chip En-

through

) are

)

Related parts for cy62127dv18

cy62127dv18 Summary of contents

Page 1

... Packages offered in a 48-ball FBGA and a 44-pin TSOP Type II [1] Functional Description The CY62127DV18 is a high-performance CMOS static RAM organized as 64K words by 16 bits. This device vanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life applications such as cellular telephones ...

Page 2

... BLE OE I/O BHE DNU DNU 8 CY62127DV18 MoBL2 I I I/O DNU ...

Page 3

... MIL-STD-883, Method 3015) Latch-up Current .................................................... > 200 mA Operating Range 0. 0.2V CCMAX Range 0. 0.2V CC Industrial Operating, Icc (mA MHz Speed [4] [4] Max. (ns) Typ. 1.95 55 0.5 55 CY62127DV18 MoBL2 [3] ................................ 0.2V to Ambient Temperature ( +85 C 1.65V to 1.95V Power Dissipation Standby, I MAX [4] [4] Max. Typ. Max. Typ. 1 2.5 5 ...

Page 4

... > < 0.2V =1.95V CC Description Test Conditions TA = 25° MHz CC(typ) Test Conditions Still Air, soldered 4.5 inch, two-layer printed circuit board CY62127DV18 MoBL2 CY62127DV18-55 [4] Min. Typ. Max. 1.4 0.2 1 0.2 –0.2 0.4 –1 +1 –1 +1 2.5 5 OUT 0 ...

Page 5

... Conditions V = 1V, CE > V 0.2V 0.2V, V > < 0. DATA RETENTION MODE V > 1. CC(min.) t CDR to V > 100 s or stable CC(min.) CC(min.) CY62127DV18 MoBL2 90% 90% 10% Fall Time: 1 V/ns UNIT V [4] Min. Typ. Max. 1 1.95 < TBD CC(min > ...

Page 6

... HIGH to Write End [9,11] [9] 10 CC(typ.)/2 is less than less than t HZCE LZCE HZBE LZBE WE BHE and/or BLE = CY62127DV18 MoBL2 Max. Unit ...

Page 7

... OHA ACE t DBE t DOE t LZOE 50% , BHE and/or BLE = BHE, BLE transition LOW and CE transition HIGH CY62127DV18 MoBL2 DATA VALID HZCE HZOE IMPEDANCE DATA VALID 50% ® HIGH Page ...

Page 8

... During the DON’T CARE period in the DATA I/O waveform, the I/Os are in output state and input signals should not be applied. Document #: 38-05226 Rev. ** ADVANCE INFORMATION [12, 16, 17, 18 SCE PWE DATA VALID IN [12, 16, 17, 18 SCE PWE DATA IN HZOE CY62127DV18 MoBL2 VALID ® Page ...

Page 9

... BHE/ BLE DATA I/O DON’ T CARE Document #: 38-05226 Rev. ** ADVANCE INFORMATION [17, 18 SCE PWE t SD DATA VALID IN [17 SCE PWE t SD DATA VALID IN CY62127DV18 ® MoBL2 LZWE Page ...

Page 10

... Data In (I/O8 – I/O15) Package Name BV48A 48-ball Fine Pitch BGA ( mm) BV48A 48-ball Fine Pitch BGA ( mm) Z44 44-lead TSOP Type II Z44 44-lead TSOP Type II CY62127DV18 MoBL2 Mode Power Deselect/Power-down Standby(I Deselect/Power-down Standby(I Deselect/Power-down Standby(I Read ...

Page 11

... Package Diagrams Document #: 38-05226 Rev. ** ADVANCE INFORMATION 48-ball VFBGA ( mm) BV48A CY62127DV18 ® MoBL2 51-85150-*A Page ...

Page 12

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. ADVANCE INFORMATION 44-pin TSOP II Z44 CY62127DV18 ® MoBL2 51-85087-A Page ...

Page 13

... Document History Page Document Title: CY62127DV18 MoBL2 Document Number: 38-05226 Issue REV. ECN NO. Date ** 118006 10/01/02 Document #: 38-05226 Rev. ** ADVANCE INFORMATION ® 1M (64K x 16) Static RAM Orig. of Change Description of Change CDY New Data Sheet CY62127DV18 ® MoBL2 Page ...

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