hyb18t512160b2fl-5 Qimonda, hyb18t512160b2fl-5 Datasheet - Page 18

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hyb18t512160b2fl-5

Manufacturer Part Number
hyb18t512160b2fl-5
Description
512-mbit Double-data-rate-two Sdram
Manufacturer
Qimonda
Datasheet
Notes
1. UDQS/UDQS is data strobe for DQ[15:8], LDQS/LDQS is data strobe for DQ[7:0]
2. LDM is the data mask signal for DQ[7:0], UDM is the data mask signal for DQ[15:8]
3.
Rev. 1.40, 2008-03
10062006-YPTZ-CDR7
V
are isolated on the device.
DDL
and
V
SSDL
are power and ground for the DLL.
V
DDL
Configuration for ×16 components, TFBGA-84 (top view)
is connected to
18
V
DD
on the device.
512-Mbit Double-Data-Rate-Two SDRAM
HY[B/I]18T512[40/80/16]0B2[C/F](L)
V
DD
,
V
DDQ
,
Internet Data Sheet
V
SSDL
FIGURE 3
,
V
SS
, and
V
SSQ

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