s-24c08ci-t8t1u3 Seiko Instruments Inc., s-24c08ci-t8t1u3 Datasheet
s-24c08ci-t8t1u3
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s-24c08ci-t8t1u3 Summary of contents
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... WLP Please contact our sales office regarding the product with WLP package. Caution This product is intended to use in general electronic devices such as consumer electronics, office equipment, and communication devices. Before using the product in medical equipment or automobile equipment including car audio, keyless entry and engine control unit, contact to SII is indispensable ...
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... GND Figure 1 S-24C08CI-J8T1U3 8-Pin TSSOP Top view GND 4 5 Figure 2 S-24C08CI-T8T1U3 2 2 PROM Pin No Symbol 1 NC VCC SCL 4 GND 5 SDA SDA SCL VCC *1. Connect to GND or V *2. All input pins have the CMOS structure. Do not set the input pins in high impedance during operation ...
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... GND *2 SDA SCL * VCC *1. Connect to GND or V *2. All input pins have the CMOS structure. Do not set the input pins in high impedance during operation. Remark See Dimensions for details of the package drawings. Pin No Symbol * VCC * ...
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... A2 SCL B1 GND * VCC *1. All input pins have the CMOS structure. Do not set the input pins in high impedance during operation. Seiko Instruments Inc. Rev.2.0 Table 5 Description Serial data I/O Serial clock input Ground Write protect input Connected Protection valid ...
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... Comparator Serial Clock Controller LOAD COMP LOAD INC Address Counter Y Decoder D OUT Figure 6 Seiko Instruments Inc. 2-WIRE CMOS SERIAL E S-24C08C VCC WP GND Voltage Detector High-Voltage Generator Data Register Memory Cell Array X Decoder Selector Data Output ACK Output Controller 2 PROM 5 ...
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... Input voltage Output voltage Operation ambient temperature Storage temperature Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Recommended Operating Conditions Item Power supply voltage ...
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... > 500 Seiko Instruments Inc. 2-WIRE CMOS SERIAL 1 5 400 kHz Min. Max 400 kHz Min. Max. 2 Min. Max. Min. 3.5 3.5 1.0 1.0 1.0 1.0 1.0 1.0 50.0 50 ...
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... Bus release time Noise suppression time SCL t HD.STA t SU.STA SDA ( input ) SDA ( output ) 8 2 PROM 0 0 less 0 0 100 pF Figure 7 Input / Output Waveform during AC Measurement Table 15 V Symbol Min SCL t 1.3 LOW t 0.6 HIGH t 0 0.6 SU.STA t 0.6 HD.STA t 100 SU ...
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... Start Condition SCL SDA t WS1 WP (valid WS2 (invalid) Table 1 5 Symbol Min Acknowledgment Write data Signal D0 Figure 9 Write Cycle Timing Seiko Instruments Inc. 2-WIRE CMOS SERIAL E S-24C08C Unit Max. 5.0 ms Start Condition Stop Condition WH1 t WH2 2 PROM 9 ...
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... Wired-OR connection by pulling SCL (Serial Clock Input) Pin The SCL pin is used for the serial clock input. Since the signals are processed at a rising or falling edge of the SCL clock, pay attention to the rising and falling time and comply with the specification. ...
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... Stop is identified by a low to high transition of the SDA line while the SCL line is stable at high. When a device receives a stop condition during a read sequence, the read operation is interrupted, and the device enters standby mode. When a device receives a stop condition during a write sequence, the reception of the write data is halted, and the S- 24C08C initiates a write cycle ...
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... SDA 4. Acknowledge The unit of data transmission is 8 bits. During the 9th clock cycle period the receiver on the bus pulls down the SDA line to acknowledge the receipt of the 8-bit data. When an internal write cycle is in progress, the device does not generate an acknowledge. ...
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... The upper 4 bits of the device address are the “Device Code”, and are fixed to “1010”. In the S-24C08C, successive 1 bit is called the “Slave Addrdess”. This 1 bit is used to identify a device on the system bus and is compared with the predetermined value which is defined by the address input pin (A2). When the comparison result matches, the slave device responds with an acknowledge during the 9th clocks cycle ...
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... Write 6. 1 Byte Write When the master sends a 7-bit device address and a 1-bit read / write instruction code set to “0”, following a start condition, the S-24C08C acknowledges it. And the S-24C08C receives 8-bit word address and responds with an acknowledge. After the S-24C08C receives 8-bit write data and responds with an acknowledge, it receives a stop condition and that initiates the write cycle at the addressed memory ...
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... In the S-24C08C, the lower 4 bits of the word address are automatically incremented every time when the S- 24C08C receives 8-bit write data. If the size of the write data exceeds 16 bytes, the upper 4 bits of the word address and page address (P1, P0) remain unchanged, and the lower 4 bits are rolled over and the last 16-byte data that the S-24C08C received will be overwritten ...
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... WP pin changes during this time, the address data being written at this time is not guaranteed. Regarding the timing of write protect, refer to Figure not using the write protect, connect the WP pin to GND or set it open. The write protect is valid in the range of operation power supply voltage. ...
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... S-24C08C (slave device). That is, if the S-24C08C does not generate an acknowledgment signal, the write cycle is in progress and if the S- 24C08C generates an acknowledgment signal, the write cycle has been completed. ...
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... Attention should be paid to the following point on the recognition of the address pointer in the S-24C08C. In Read, the memory address counter in the S-24C08C is automatically incremented after output of the 8th bit of the data. In Write, on the other hand, the upper bits of the memory address (the upper bits of the word address are left unchanged and are not incremented. ...
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... Random read is used to read the data at an arbitrary memory address. A dummy write is performed to load the memory address into the address counter. When the S-24C08C receives a 7-bit device address and a 1-bit read / write instruction code set to “0” following a start condition, it responds with an acknowledge. ...
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... S-24C08C 7. 3 Sequential Read When the S-24C08C receives a 7-bit device address and a 1-bit read / write instruction code set to “1” following a start condition both in current address read and random read, it responds with an acknowledge. When an 8-bit data is output from the S-24C08C synchronous to the SCL clock, the address counter is automatically incremented ...
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... Its detection and release voltages are 1.20 V typ. (Refer to Figure 22). The S-24C08C cancels Write by detecting a low power supply voltage when it receives a stop condition. In the data trasmission and the Write operation, data in the address written during the low power supply voltage is not assurable. ...
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... In case that the SCL input pin of the S-24C08C is connected to the Nch open drain output pin of the master device, connect the SCL pin with a pull-up resistor. As well, in case the SCL input pin of the S-24C08C is connected to the tri- state output pin of the master device, connect the SCL pin with a pull-up resistor in order not to set it in high impedance ...
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... Rev.2.0 _00_H WP A2 2-WIRE CMOS SERIAL E Figure 25 WP Pin Figure 26 A2 Pin Seiko Instruments Inc. 2 PROM S-24C08C 23 ...
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... In the S-24C08C, users are able to reset the internal circuit by inputting a start condition and a stop condition. Although the reset signal is input to the master device, the S-24C08C’s internal circuit does not go in reset, but it does by inputting a stop condition to the S-24C08C. The S-24C08C keeps the same status thus cannot do the next operation ...
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... V (Max.) 0.2 V INIT * means there is no difference in potential between the VCC pin and the GND pin of the S-24C08C. * the time required to initialize the S-24C08C. No instructions are accepted during this time. INIT = 200 ms seen in Figure 29. The power supply voltage ...
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... The voltage drops due to power off while the S-24C08C is being accessed. Even if the master device is reset due to the low power voltage, the S-24C08C may malfunction unless the power-on-clear operation conditions of S- 24C08C are satisfied. When not using this rise time seen in Figure 29, adjust the phase (reset) to reset the internal circuit in the S- 24C08C normally. 26 ...
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... Rev.2.0 _00_H 5. 2 Initialization time The S-24C08C initializes at the same time when the power supply voltage is raised. Input instructions to the S- 24C08C after initialization. S-24C08C does not accept any instruction during initialization. Figure 30 shows the initialization time of the S-24C08C. Initialization Time (t INIT ...
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... The S-24C08C may error if it does not recognize a start / stop condition correctly during transmission recommended to set the delay time of 0.3 s minimum from a falling edge of SCL for the SDA. This is to prevent S-24C08C from going in a start / stop condition due to the time lag caused by the load of the bus line. ...
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... By a start condition, users are able to cancel command which is being input. However, adjust the phase while the S- 24C08C is outputting “L” because users are not able to input a start condition. When users cancel the command, there may be a case that the address will not be identified. Use random read for the read operation, not current address read. ...
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... In this package, the overcoat of the resin of translucence is carried out on the side of device area. Keep it mind that it may affect the characteristic of a device when exposed a device in the bottom of a high light source. ...
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... SOP (JEDEC), 8-Pin TSSOP, SNT-8A, TMSOP-8 S-24C08C I xxxx U3 2. WLP S-24C08C I H6Tx S3 Remark Please contact our sales office regarding the product with WLP package. 2-WIRE CMOS SERIAL E Package name (abbreviated) and IC packing specification J8T1: 8-Pin SOP (JEDEC), Tape T8T1: 8-Pin TSSOP, Tape ...
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... Use of the information described herein for other purposes and/or reproduction or copying without the express permission of Seiko Instruments Inc. is strictly prohibited. The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc ...