hm62w16256b Renesas Electronics Corporation., hm62w16256b Datasheet - Page 13

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hm62w16256b

Manufacturer Part Number
hm62w16256b
Description
4 M Sram 256-kword X 16-bit - Hitachi Semiconductor
Manufacturer
Renesas Electronics Corporation.
Datasheet
Low V
Parameter
V
Data retention current
Chip deselect to data
retention time
Operation recovery time
Notes: 1. This characteristic is guaranteed only for L-version, 10 A max. at Ta = 0 to +40 C.
CC
for data retention
2. This characteristic is guaranteed only for L-SL version, 5 A max. at Ta = 0 to +40 C.
3. CS2 controls address buffer, WE buffer, CS1 buffer, OE buffer, LB, UB buffer and Din buffer. If
4. Typical values are at V
5. t
CC
CS2 controls data retention mode, Vin levels (address, WE, OE, CS1, LB, UB, I/O) can be in the
high impedance state. If CS1 controls data retention mode, CS2 must be CS2
impedance state.
Data Retention Characteristics (Ta = 0 to +70 C)
RC
CS2
= read cycle time.
0.2 V. The other input levels (address, WE, OE, LB, UB, I/O) can be in the high
Symbol
V
I
I
t
t
CCDR
CCDR
CDR
R
DR
CC
*
*
1
2
= 3.0 V, Ta = +25˚C and not guaranteed.
Min
2.0
0
t
RC
*
5
Typ*
0.8
0.8
4
Max
20
10
V
ns
Unit
ns
A
A
HM62W16256B Series
Test conditions*
Vin
(1) 0 V
(2) CS2
(3) LB = UB
V
(1) 0 V
(2) CS2
(3) LB = UB
See retention waveform
CC
CS1
CS2
CS1
CS1
CS2
CS1
= 3.0 V, Vin
0V
V
CS2
CS2
V
V
V
V
CC
V
0.2 V
V
0.2 V
CC
CC
CC
CC
CC
CC
– 0.2 V or 0 V
– 0.2 V
– 0.2 V
– 0.2 V,
– 0.2 V
– 0.2 V or
V
– 0.2 V or
V
CC
CC
0.2 V or
0.2 V or
3
0V
– 0.2 V
– 0.2 V
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