at17lv020 ATMEL Corporation, at17lv020 Datasheet

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at17lv020

Manufacturer Part Number
at17lv020
Description
2-megabit Fpga Configuration Eeprom Memory
Manufacturer
ATMEL Corporation
Datasheet

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Features
Description
The AT17C020 and AT17LV020 (high-density AT17 Series) FPGA Configuration
EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration mem-
ory for Field Programmable Gate Arrays. The AT17 Series is packaged in the popular
20-pin PLCC. The AT17 Series family uses a simple serial-access procedure to con-
figure one or more FPGA devices. The AT17 Series organization supplies enough
memory to configure one or multiple smaller FPGAs. The user can select the polarity
of the reset function by programming internal EEPROM bytes. These devices also
support a system-friendly READY pin, which signifies a “good” power level to the
FPGA and can be used to ensure reliable system power-up.
The AT17 Series Configurators can be programmed with industry-standard program-
mers or Atmel’s ATDH2200E Programming System.
Pin Configurations
RESET/OE
EE Reprogrammable 2,097,152 x 1 bit Serial Memories Designed to Store Configuration
Programs for Field Programmable Gate Arrays (FPGAs)
In-System Programmable via 2-wire Bus
Simple Interface to SRAM FPGAs
Compatible with Atmel AT6000, AT40K FPGAs, Altera FLEX
ORCA
Cascadable Read Back to Support Additional Configurations or
Future Higher-density Arrays
Low-power CMOS EEPROM Process
Programmable Reset Polarity
Available in PLCC Package (Pin Compatible across Product Family)
Emulation of Atmel’s AT24CXXX Serial EEPROMs
Available in 3.3V ± 10% LV and 5V ± 5% C Versions
System-friendly READY Pin
Low-power Standby Mode
CLK
NC
NC
CE
®
FPGAs, Xilinx XC3000, XC4000, XC5200, Spartan
4
5
6
7
8
PLCC
18
17
16
15
14
NC
SER_EN
NC
READY
CEO(A2)
®
, Virtex
®
Devices,
®
FPGAs
2-megabit
FPGA
Configuration
EEPROM
Memory
AT17C020
AT17LV020
Rev. 1239D–05/01
1

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at17lv020 Summary of contents

Page 1

... Low-power Standby Mode Description The AT17C020 and AT17LV020 (high-density AT17 Series) FPGA Configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration mem- ory for Field Programmable Gate Arrays. The AT17 Series is packaged in the popular 20-pin PLCC. The AT17 Series family uses a simple serial-access procedure to con- figure one or more FPGA devices ...

Page 2

Block Diagram FPGA Master Serial Mode Summary Controlling the High- density AT17 Series Serial EEPROMs During Configuration AT17C/LV020 2 The I/O and logic functions of the FPGA and their associated interconnections are established by a configuration program. The program is ...

Page 3

Condition 1 Condition 2 Cascading Serial Configuration EEPROMs AT17 Series Reset Polarity The simplest connection is to have the FPGA CON pin drive both CE and RESET/OE in parallel. Due to its simplicity, however, this method will fail if the ...

Page 4

Programming Mode Standby Mode Pin Configurations 20-pin PLCC Name I/O 2 DATA I/O 4 CLK I 6 RESET/ GND CEO READY O 17 SER_EN I 20 VCC AT17C/LV020 4 erence ...

Page 5

... These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under + 0.5V Operating Conditions is not implied. Exposure to CC Absolute Maximum Ratings conditions for extended periods of time may affect device reli- ability. AT17C020 AT17LV020 Min Max Min/ Max Units 4.75 5.25 3.0 3 ...

Page 6

DC Characteristics ± 5% Commercial, 5V ± 10% Industrial/Military CC Symbol Description V High-level input voltage IH V Low-level input voltage IL V High-level output voltage ( Low-level output voltage ( High-level output ...

Page 7

AC Characteristics CE RESET/OE CLK T CE DATA AC Characteristics When Cascading RESET/OE CE CLK LAST BIT DATA CEO T SCE CAC T CDF T OCK T OCE T SCE T T HOE ...

Page 8

AC Characteristics for AT17C020 ± 5% Commercial ± 10% Industrial/Military CC CC Symbol Description ( Data Delay OE ( Data Delay CE (2) T CLK to Data Delay ...

Page 9

... MAX Input Clock Frequency MAX Notes: 1. Preliminary specifications for military operating range only test load = 50 pF. 3. Float delays are measured with loads. Transition is measured ±200 mV from steady state active levels. AC Characteristics for AT17LV020 When Cascading V = 3.3V ± 10% CC Symbol Description ...

Page 10

... Ordering Information - 3.3V Devices Memory Size 2Mb 20J 20-lead, Plastic J-leaded Chip Carrier (PLCC) AT17C/LV020 10 Ordering Code AT17C020-10JC AT17C020-10JI Ordering Code AT17LV020-10JC AT17LV020-10JI Package Type Package Operation Range 20J Commercial (0°C to 70°C) 20J Industrial (-40°C to 85°C) Package Operation Range 20J Commercial (0° ...

Page 11

Packaging Information 20J, 20-lead, Plastic J-leaded Chip Carrier (PLCC) Dimensions in Inches and (Millimeters) 11 ...

Page 12

... Atmel Corporation 2001. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...

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