m51996ap Renesas Electronics Corporation., m51996ap Datasheet - Page 31

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m51996ap

Manufacturer Part Number
m51996ap
Description
Switching Regulator Control
Manufacturer
Renesas Electronics Corporation.
Datasheet

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M51996AP
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M51996AP
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M51996AP/AFP
Output Circuit
1. The output terminal characteristics at the V
2. MOS FET gate drive power dissipation
REJ03D0836-0201 Rev.2.01 Nov 14, 2007
Page 31 of 35
The output terminal has the current sink ability even though the V
voltage or V
voltage versus sink current.)
This characteristics has the merit not to damage the MOS FET at the stop of operation when the V
decreases lower than the voltage of V
characteristics to the output terminal, is drawn out rapidly.
The output terminal has the draw-out ability above the V
ability and the output terminal potential may rise due to the leakage current.
In this case, it is recommended to connect the resistor of 100 k between gate and source of MOS FET as shown in
figure 32.
Figure 33 shows the relation between the applied gate voltage and the stored gate charge.
In the region 1, the charge is mainly stored at C
of MOS FET and the high drain voltage.
In the region 2, the C
state to on-state.
In the region 3, both the C
is low.
The charging and discharging current caused by this gate charge makes the gate power dissipation. The relation
between gate drive current I
Where
I
f
D
OSC
Figure 33 The Relation Between Applied Gate-source Voltage and Stored Gate Charge
= Q
is switching frequency
GSH
CC(STOP)
Figure 32 Circuit Diagram to Prevent The MOS-FET Gate potential Rising
• f
20
15
10
OSC
5
0
Total Stored Gate Charge Q
0
(It means that the terminal is “Output low state” and please refer characteristics of output low
(1)
GD
……………………………………………… (9)
is multiplied by the “mirror effect” as the characteristics of MOS FET transfers from off-
GD
4
D
V
(2)
and C
and total gate charge Q
DS
= 80 V
200 V
320 V
8
GS
(3)
CC(STOP)
affect to the characteristics as the MOS FET is on-state and the drain voltage
M51996A
12
I
CC
D
, as the gate charge of MOS FET, which shows the capacitive load
= 4 A
voltage lower than the “Operation-stop” voltage
16
GS
GSH
as the depletion is spread and C
V
OUT
(nC)
GSH
20
CC
is shown by following equation;
100 kΩ
voltage of 2 V, however, lower than the 2V, it loses the
transformer
CC
To main
voltage lower than the “Operation-stop”
Gate
R
CLM
C
V
GD
GS
GD
C
GS
is small owing to the off-state
Source
Drain
C
I
D
DS
CC
V
voltage
D

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