s-8243b Seiko Instruments Inc., s-8243b Datasheet - Page 16

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s-8243b

Manufacturer Part Number
s-8243b
Description
Battry Protection Ic For 3-serial Or 4-serial Cell Pack
Manufacturer
Seiko Instruments Inc.
Datasheet
16
BATTERY PROTECTION IC FOR 3-SERIAL OR 4-SERIAL CELL PACK
S-8243A/B Series
1. Battery protection circuit
Operation
Battery protection protects batteries from overcharge and overdischarge, and also protects external FETs from
overcurrent.
1. 1 Normal condition
1. 2 Overcharge condition
1. 3 Overdischarge condition
1. 4 Power down condition
1. 5 Overcurrent condition
When all of the battery voltages are in the range from V
value (the VMP pin voltage is lower than V
When any one of the battery voltages becomes higher than V
pin becomes high impedance and is pulled up to EB+ pin voltage by an external resistor, and the charging FET is
turned off to stop charging. The overcharge condition is released when one of the following two conditions holds.
When any one of the battery voltages becomes lower than V
voltage becomes V
due to overdischarge condition, the S-8243 enters power down condition.
After stopping discharging due to overdischarge condition, the S-8243 enters power down condition. In this
condition, almost all circuits of the S-8243 are stopped to save current consumption. The current consumption
becomes lower than I
resistor. In power down condition, output pin voltages are fixed at the following levels.
The S-8243 has three overcurrent detection levels (V
times (t
becomes higher than a specified value (the voltage between V
continues for t
level to turn off the discharging FET to stop discharging, the COP pin becomes high impedance and is pulled up to
EB+ pin voltage by an external resistor to turn off the charging FET to stop charging, and the VMP pin is pulled up to
V
overcurrent detection delay times (t
The overcurrent condition is released when the following condition holds.
DD
(a) All battery voltages become lower than V
(b) V
(a) COP
(b) DOP
(c) VREG
(d) VBATOUT
The power down condition is released when the following condition holds.
The overdischarging status is released when the following condition holds.
(a) V
voltage by the internal resistor R
(a) V
(a) All of the battery voltages are V
EB+ pin becomes higher. )
IOV1
DD
MP
connected.)
−V
> {V
, t
MP
MP
IOV2
>V
IOV1
IOV3
>V
IOV3
and t
or longer, the S-8243 enters the overcurrent condition in which the DOP pin voltage becomes V
IOV1
DD
/ (1−V
V
V
V
V
(A charger is connected, and charging starts.)
PDN
SS
DD
SS
SS
level, and the discharging FET is turned off to stop discharging. After discharging is stopped
(A load is connected, and discharging starts.)
IOV3
. In the power down condition, the VMP pin is pulled down to V
IOV3
) corresponding to each overcurrent detection levels. When the discharging current
) × 3 / 5−2 / 5} × R
(Charging FET is turned on)
(Discharging FET is turned off)
(Voltage regulator circuit is off)
(Battery voltage monitor amp circuit is off)
IOV2
VDM
and t
Seiko Instruments Inc.
. Operation of two other overcurrent detection levels (V
DLn
IOV1
IOV3
or higher, and the VMP pin voltage is VDD / 2 or higher. (A charger is
), the charging and discharging FETs are turned on.
VDM
CUn
) is the same as that for V
+ V
(A load is released, and the impedance between the EB− and
DLn
IOV1
HCn
to V
.
, V
DLn
IOV2
CUn
CUn
and the state continues for t
and the discharge current is lower than a specified
and the state continues for t
and V
DD
and V
IOV3
IOV1
MP
) and three overcurrent detection delay
is greater than V
and t
IOV1
.
SS
level by the internal R
DL
or longer, the DOP pin
CU
IOV1
or longer, the COP
IOV2
) and the state
Rev.2.5
and V
IOV3
) and
_00
VSM
DD

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