s1f78520 Epson Electronics America, Inc., s1f78520 Datasheet - Page 7

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s1f78520

Manufacturer Part Number
s1f78520
Description
Charge-pump Step Down Regulator With Power Saving Mode
Manufacturer
Epson Electronics America, Inc.
Datasheet
Rev. 1.2
FUNCTIONAL DESCRIPTION
Operational description
Oscillation circuit
S1F78520 is a power supply IC which generates two output voltages, 3.3V (or 2.9V or 2.5V) and 2.5V (or 2.0V
or 1.8V), stabilized from Li-ion batteries. High conversion efficiencies can be aquired under heavy loads by
standby input signal. While low consuming current operations can be realized under light load state.
Generating voltage levels are:
• LDO (series regulator) output voltage [3.3 V or 2.9 V or 2.5 V]*1 (V
• Voltage dropping type charge pump output voltage [2.5 V or 2.0 V or 1.8 V]*2 (V
*1: Selection of 3.3 V or 2.9 V or 2.5 V is to be designated by use of the external pins VO1LV1, VO1LV0.
*2: Selection of 2.5 V or 2.0 V or 1.8 V is to be designated by use of the external pins VO2LV1, VO2LV0.
The V
V
While the V
ent voltage dropping ratios for the voltage dropping type charge pump to let it work on the potential difference
occurring between “V
by fine adjustments of the switching frequencies. Since an extra voltage stabilizing circuit is not being used for
the output, high conversion efficiencies can be acquired.
Indicated below is the system configuration diagram for the power circuit.
The S1F78520 incorporates an oscillation circuit for the voltage dropping clock. This circuit is to be used
connecting the oscillation current adjusting external resistor ROSC between the ROSC1 pin and the V
oscillation circuit will stop operation under shut down state (XPOFF = V
interrupted by setting the ROSC1 pin to the V
As the oscillation current adjusting external resistance, we recommend use of ROSC = 1MEG .
SS
*
” using the V
OUT1
output voltage is being generated by stabilizing the potential difference occurring between “V
OUT2
V
V
voltage is being generated after selection of the optimum voltage dropping ratio among differ-
DD
SS
SS
*
DD
potential as the reference voltage.
*
– V
SS
S1F78520
*
” using the V
Fig. 2 System configuration diagram
SS
DD
PG
XVDET
V
V
OUT1
OUT2
*
*
potential as the reference voltage and stabilizing the voltage
level or by making the pin into open state.
OUT1
LSI, CPU, RAM, etc.
SS
*
)
level). Also, the oscillation will be
OUT2
)
S1F78520
SS
DD
. The
*
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