lm5039mhx National Semiconductor Corporation, lm5039mhx Datasheet - Page 19

• Manufacturer Part Number: lm5039mhx
• Description: Half-bridge Pwm Controller With Average Current Limit
• Manufacturer: National Semiconductor Corporation

PROGRAMMABLE DELAY (DLY)
The R
SR2 signals and the HO and LO driver outputs.
shows the relationship between these outputs. The DLY pin
is nominally set at 2.5V and the current is sensed through
R
deadtime before the HO and LO pulse (T1) and after the HO
and LO pulse (T2). Typically R
100kΩ. The deadtime periods can be calculated using the
following formulae:
It is recommended that the delay resistor be not less than 10K.
If the programmed delay is zero, it can either short the sec-
ondary, or potentially result in cross-conduction in the prima-
ry, or both. Should an SR MOSFET remain on while the
opposing primary MOSFET is supplying power through the
power transformer, the secondary winding will experience a
momentary short circuit, causing a significant power loss to
occur.
When choosing the R
lays and component tolerances should be considered to as-
sure that there is never a time where both SR MOSFETs are
enabled AND one of the primary side MOSFETs is enabled.
The time period T1 should be set so that the SR MOSFET has
turned off before the primary MOSFET is enabled. Converse-
ly, T1 and T2 should be kept as low as tolerances allow to
optimize efficiency. The SR body diode conducts during the
time between the SR MOSFET turns off and the power trans-
former begins supplying energy. Power losses increase when
this happens since the body diode voltage drop is many times
higher than the MOSFET channel voltage drop. The interval
of body diode conduction can be observed with an oscillo-
DLY
to ground. This current is used to adjust the amount of
DLY
resistor programs the delays between the SR1 and
T2 = .0007 x R
T1 = .003 x R
DLY
value, worst case propagation de-
DLY
DLY
DLY
+ 10.01 ns
is in the range of 10kΩ to
+ 4.6 ns
FIGURE 10. Basic UVLO Configuration
Figure 5
19
scope as a negative 0.7V to 1.5V pulse at the SR MOSFET
drain.
UVLO Divider Selection
A dedicated comparator connected to the UVLO pin is used
to detect under-voltage condition. When the UVLO pin volt-
age is below 0.4V, the controller is in a low current shutdown
mode. For a UVLO pin voltage greater than 0.4V but less than
1.25V the controller is in standby mode. Once the UVLO pin
voltage is greater than 1.25V, the controller is fully enabled.
When the UVLO pin voltage rises above 1.25V threshold, an
internal 23µA current source is activated thus providing
threshold hysteresis. The 23µA current source is deactivated
when the voltage at the UVLO pin falls below 1.25V. Resis-
tance values for R1 and R2 can be determined from the
following equations:
Where V
desired UVLO hysteresis at VPWR.
For example, if the LM5039 is to be enabled when VPWR
reaches 33V, and disabled when VPWR is decreased to 30V,
R1 should be 130kΩ, and R2 should be 5.11kΩ. The voltage
at the UVLO pin should not exceed 7V at any time. Be sure
to check both the power and voltage rating (0603 resistors
can be rated as low as 50V) for the selected R1 resistor. To
maintain the threshold’s accuracy, a resistor tolerance of 1%
or better is recommended. Remote configuration of the
controller’s operational modes can be accomplished with
open drain device(s) connected to the UVLO pin as shown in
Figure
10.
PWR
is the desired turn-on voltage and V
30100530
www.national.com
HYS
is the