lm5085sdx National Semiconductor Corporation, lm5085sdx Datasheet - Page 15

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lm5085sdx

Manufacturer Part Number
lm5085sdx
Description
75v Constant On-time Pfet Buck Switching Controller
Manufacturer
National Semiconductor Corporation
Datasheet

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with the minimum value for the ADJ pin current (32 µA), the
required R
A standard value 2.1 kΩ resistor is selected. The nominal
current limit threshold calculates to:
Using the tolerances for the ADJ pin current and the current
limit comparator offset, the maximum current limit threshold
calculates to:
The minimum current limit thresholds calculate to:
The load current in each case is equal to the current limit
threshold minus half the current ripple amplitude. The recom-
mended value of 1000 pF for C
C
very low in this example (5 mVp-p), the minimum ripple con-
figuration (R3, C1, and C2 in the Block Diagram) must be
used. The resulting ripple at V
ripple current passing through C
can be selected based on the maximum allowable ripple volt-
age at V
The following calculation, based on ripple voltage, provides a
first order result for the value of C
where I
above, and V
A 100 µF capacitor is selected. Typically the ripple amplitude
will be higher than the calculations indicate due to the
capacitor’s ESR.
R3, C1, C2: The minimum ripple configuration uses these
three components to generate the ripple voltage required at
the FB pin since there is insufficient ripple at V
of 25 mVp-p must be applied to the FB pin to obtain stable
constant frequency operation. R3 and C1 are selected to
generate a sawtooth waveform at their junction, and that
waveform is AC coupled to the FB pin via C2. The values of
the three components are determined using the following pro-
cedure:
OUT
: Since the maximum allowed output ripple voltage is
Calculate V
OR(max)
OUT
ADJ
, or based on transient response requirements.
RIPPLE
resistor calculates to:
is the maximum ripple current calculated
A
= V
is the allowable ripple at V
OUT
- (V
OUT
SW
ADJ
OUT
x (1 – (V
is then due to the inductor’s
OUT
is used in this example.
. This capacitor’s value
:
OUT
OUT
/V
OUT
IN(min)
. A minimum
.
)))
15
where V
during the off-time, typically 0.5V to 1V depending on the
diode D1. Using a typical value of 0.65V, V
4.81V. V
and is used in the next equation:
where t
age), and ΔV is the desired ripple amplitude at the R3/C1
junction, typically 25 mVp-p. For this example
R3 and C1 are then selected from standard value compo-
nents to produce the product calculated above. Typical values
for C1 are 3000 pF to 10,000 pF, and R3 is typically from 10
kΩ to 300 kΩ. C2 is then chosen large compared to C1, typ-
ically 0.1 µF. For this example, 3300 pF is chosen for C1,
requiring R3 to be 67.7 kΩ. A standard value 66.5 kΩ resistor
is selected.
C
supplying most of the switch current during the on-time. At
maximum load current, when Q1 is switched on, the current
through Q1 suddenly increases to the lower peak of the
inductor’s ripple current, then ramps up to the upper peak,
and then drops to zero at turn-off. The average current during
the on-time is the load current. For a worst case calculation,
these capacitors must supply this average load current during
the maximum on-time, while limiting the voltage drop at VIN.
For this example, 0.5V is selected as the maximum allowable
droop at VIN. Their minimum value is calculated from:
A 33 µF electrolytic capacitor is selected for C
ceramic capacitor is selected for C
C
indicates, and therefore it may be desirable to increase C
47 µF or 68 µF. C
the VIN and GND pins of the LM5085. The voltage rating for
both capacitors must be at least 55V. The RMS ripple current
rating for the input capacitors must also be considered. A
good approximation for the required ripple current rating is
I
D1: A Schottky diode is recommended. Ultra-fast recovery
diodes are not recommended as the high speed transitions at
the SW pin may affect the regulator’s operation due to the
diode’s reverse recovery transients. The diode must be rated
for the maximum input voltage, and the worst case current
limit level. The average power dissipation in the diode is cal-
culated from:
where V
time duty cycle. Using Equation 1, the minimum duty cycle
occurs at maximum input voltage, and is calculated to be
lates to be:
RMS
IN
IN
9.1% in this example. The diode power dissipation calcu-
, C
, the ripple at VIN will likely be higher than the calculation
> I
BYP
OUT
ON
SW
F
A
: These capacitors limit the voltage ripple at VIN by
is the diode’s forward voltage drop, and D is the on-
is the nominal DC voltage at the R3/C1 junction,
/2.
P
is the maximum on-time (at minimum input volt-
is the absolute value of the voltage at the SW node
D1
= 0.65V x 5A x (1- 0.091) = 2.95W
BYP
P
D1
must be located as close as possible to
= V
F
x I
OUT
x (1-D)
BYP
. Due to the ESR of
A
IN
calculates to
, and a 1 µF
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IN
to

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