r2j20656anp Renesas Electronics Corporation., r2j20656anp Datasheet - Page 12
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r2j20656anp
Manufacturer Part Number
r2j20656anp
Description
Integrated Driver - Mos Fet Drmos
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R2J20656ANP.pdf
(16 pages)
R2J20656ANP
The PWM input is TTL level and has hysteresis. When the signal route from the control IC is high impedance, the tri-
state function turns off the high- and low-side MOS FETs. This function operates when the PWM input signal stays in
the input hysteresis window for 150 ns (typ.). After the tri-state mode has been entered and GH and GL have become
low, a PWM input voltage of 4.0 V or more is required to make the circuit return to normal operation.
R07DS0201EJ0100 Rev.1.00
Jan 25, 2011
PWM
PWM
GH
GL
GH
GL
DEM Operation (ZCD_EN# = "L" in Light load condition)
IL
PWM
GH
GL
3.2 V
1.5 V
3.2 V
1.5 V
0 A
Figure 2 PWM Shutdown-Hold Time Signal
Figure 1.2 Typical Signals during DEM
150 ns (t
150 ns (t
HOLD-OFF
HOLD-OFF
)
)
150 ns (t
150 ns (t
HOLD-OFF
HOLD-OFF
)
)
Page 12 of 15
Preliminary