ml4869 Micro Electronics Corporation, ml4869 Datasheet - Page 7
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ml4869
Manufacturer Part Number
ml4869
Description
Medium Current Boost Regulator With Load Disconnect
Manufacturer
Micro Electronics Corporation
Datasheet
1.ML4869.pdf
(8 pages)
DEISGN CONSIDERATIONS
In applications where the ML4869 is operated at or near
the maximum output current, it is recommended to add a
10nF to 100nF ceramic or film capacitor from V
GND. The optimum value of the high frequency bypass
capacitor is dependent on the layout and the value of the
bulk output capacitor selected.
INPUT CAPACITOR
Due to the high input current drawn at startup and
possibly during operation, it is recommended to decouple
the input with a capacitor with a value of 47µF to 100µF.
This filtering prevents the input ripple from affecting the
ML4869 control circuitry, and also improves the
efficiency by reducing the I
cycle of the inductor. Again, a low ESR capacitor (such as
tantalum) is recommended.
It is also recommended that low source impedance
batteries be used. Otherwise, the voltage drop across the
source impedance during high input current situations will
cause the ML4869 to fail to startup or to operate
unreliably. In general, for two cell applications the source
impedance should be less than 400m , which means that
small alkaline cells should be avoided.
SHUTDOWN
To guarantee proper operation, SHDN must be pulled to
within 0.5V of GND or V
dissipation and possible oscillations. A graph of input
leakage current while in shutdown is shown in Figure 6.
LAYOUT
Good layout practices will ensure the proper operation of
the ML4869. Some layout guidelines follow:
• Use adequate ground and power traces or planes
• Keep components as close as possible to the ML4869
• Use short trace lengths from the inductor to the V
• Use a single point ground for the ML4869 PWR GND
• Separate the ground for the converter circuitry from the
V
pin and the input and output capacitors, and connect
the GND pin to PWR GND using a separate trace
ground of the load circuitry and connect at a single
point
L2
pins and from the output capacitor to the V
IN
2
to prevent excessive power
R losses during the charge
(Continued)
OUT
OUT
L1
to
and
pin
DESIGN EXAMPLE
In order to design a boost converter using the ML4869,
it is necessary to define the values of a few parameters.
For this example, we have assumed that V
3.6V, V
First, it must be determined whether the ML4869 is
capable of delivering the output current. This is done
using Equation 1:
Next, select an inductor:
As previously mentioned, it is the recommended
inductance is 10µH. Make sure that the peak current
rating of the inductor is at least 1.0A, and that the DC
resistance of the inductor is in the range of 50 to 100m .
Finally, the value of the output capacitor is determined
using Equation 3:
The closest standard value would be a 100µF capacitor
with an ESR rating of 100m . If such a low ESR value
cannot be found, two 47µF capacitors in parallel could
also be used.
The complete circuit is shown in Figure 8. As mentioned
previously, the use of an input supply bypass capacitor is
strongly recommended.
I
C
V IN
O U T
Figure 8. Design Example Schematic Diagram
100µF
OUT
OUT
(
5
V
= 5.0V, and I
)
44 10
5 0
0 6 8 6
.
.
V
H
V L1
V IN
GND
SHDN
(SUMIDA CD5A)
OUT(MAX)
88
V
ML4869
IN M IN
10µH
5
F
PWR GND
(
V
V OUT
0.01µF
)
V L2
= 250mA
NC
0 2 6 7
.
100µF
IN
ML4869
= 3.0V to
A
V OUT
7