W83627G Winbond Electronics Corp America, W83627G Datasheet - Page 98

• Manufacturer Part Number: W83627G
• Description: LPC Interface I/O plus Game Port, MIDI Port, Pb-free package
• Manufacturer: Winbond Electronics Corp America

9.6
CR30 （Default 0x01 if PNPCVS = 0 during POR, default 0x00 otherwise）
CR60, CR 61 （Default 0x02, 0xF8 if PNPCVS = 0 during POR, default 0x00, 0x00 otherwise）
CR70 （Default 0x03 if PNPCVS = 0 during POR, default 0x00 otherwise）
CRF0 （Default 0x00）
These two registers select Serial Port 2 I/O base address [0x100：0xFF8] on 8 byte boundary.
7 - 1
7 - 4
3 - 0
7 - 4
1 - 0
BIT
BIT
BIT
0
3
2
Logical Device 3 （UART B）
Reserved.
These bits select IRQ resource for Serial Port 2.
Reserved.
RXW4C
0： No reception delay when IR is changed from TX mode to RX mode.
1： Reception delays 4 characters time （40 bit-time） when SIR is changed from TX
TXW4C
0： No transmission delay when SIR is changed from RX mode to TX mode.
1： Transmission delays 4 characters time （40 bit-time） when SIR is changed from
SUBCLKB1, SUBCLKB0
00： UART B clock source is 1.8462 Mhz （24MHz/13）
01： UART B clock source is 2 Mhz （24MHz/12）
10： UART B clock source is 24 Mhz （24MHz/1）
11： UART B clock source is 14.769 Mhz （24mhz/1.625）
Reserved.
Logic device activation control
1： Active
0： Inactived
mode to RX mode.
RX mode to TX mode.
- 94 -
DESCRIPTION
DESCRIPTION
DESCRIPTION
W83627HF/ F/ HG/ G