pic24hj128gp510at-i-pt Microchip Technology Inc., pic24hj128gp510at-i-pt Datasheet - Page 150

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pic24hj128gp510at-i-pt

Manufacturer Part Number
pic24hj128gp510at-i-pt
Description
High-performance, 16-bit Microcontrollers
Manufacturer
Microchip Technology Inc.
Datasheet
PIC24HJXXXGPX06A/X08A/X10A
A block diagram for a 32-bit timer pair (Timer4/5)
example is shown in Figure 13-1 and a timer (Timer4)
operating in 16-bit mode example is shown in
Figure 13-2.
FIGURE 13-1:
DS70592A-page 148
Note:
Note 1:
T2CK
Set T3IF
ADC Event Trigger
2:
Only Timer2 and Timer3 can trigger a
DMA data transfer.
The 32-bit timer control bit, T32, must be set for 32-bit timer/counter operation. All control bits are respective
to the T2CON register.
The ADC event trigger is available only on Timer2/3.
Data Bus<15:0>
TGATE
TIMER2/3 (32-BIT) BLOCK DIAGRAM
0
1
(2)
Read TMR2
Write TMR2
Equal
Reset
MSb
16
TMR3HLD
16
TMR3
PR3
16
Comparator
Preliminary
Q
Q
Gate
Sync
T
CY
CK
16
TMR2
PR2
D
(1)
LSb
1x
01
00
Sync
TON
TGATE
TCS
© 2009 Microchip Technology Inc.
TCKPS<1:0>
1, 8, 64, 256
Prescaler
2

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