dspic33fj128gp706at-i-pt Microchip Technology Inc., dspic33fj128gp706at-i-pt Datasheet - Page 195

• Manufacturer Part Number: dspic33fj128gp706at-i-pt
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

REGISTER 18-1:
© 2009 Microchip Technology Inc.
bit 4
bit 3
bit 2-1
bit 0
Note 1: Refer to Section 17. “UART” (DS70188) in the “dsPIC33F Family Reference Manual” for information on
2: This feature is only available for the 16x BRG mode (BRGH = 0).
enabling the UART module for receive or transmit operation.
URXINV: Receive Polarity Inversion bit
1 = UxRX Idle state is ‘0’
0 = UxRX Idle state is ‘1’
BRGH: High Baud Rate Enable bit
1 = BRG generates 4 clocks per bit period (4x baud clock, High-Speed mode)
0 = BRG generates 16 clocks per bit period (16x baud clock, Standard mode)
PDSEL<1:0>: Parity and Data Selection bits
11 = 9-bit data, no parity
10 = 8-bit data, odd parity
01 = 8-bit data, even parity
00 = 8-bit data, no parity
STSEL: Stop Bit Selection bit
1 = Two Stop bits
0 = One Stop bit
UxMODE: UART
dsPIC33FJXXXGPX06A/X08A/X10A
x
MODE REGISTER (CONTINUED)
Preliminary
DS70593A-page 193