dspic33fj128gp706at-i-pt Microchip Technology Inc., dspic33fj128gp706at-i-pt Datasheet - Page 231

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dspic33fj128gp706at-i-pt

Manufacturer Part Number
dspic33fj128gp706at-i-pt
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
REGISTER 20-5:
REGISTER 20-6:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-0
RSE15
TSE15
R/W-0
R/W-0
R/W-0
R/W-0
RSE7
TSE7
RSE<15:0>: Receive Slot Enable bits
1 = CSDI data is received during the individual time slot n
0 = CSDI data is ignored during the individual time slot n
TSE<15:0>: Transmit Slot Enable Control bits
1 = Transmit buffer contents are sent during the individual time slot n
0 = CSDO pin is tri-stated or driven to logic ‘0’, during the individual time slot, depending on the state
RSE14
TSE14
R/W-0
R/W-0
R/W-0
R/W-0
RSE6
TSE6
of the CSDOM bit
RSCON: DCI RECEIVE SLOT CONTROL REGISTER
TSCON: DCI TRANSMIT SLOT CONTROL REGISTER
dsPIC33FJXXXGPX06A/X08A/X10A
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
RSE13
TSE13
R/W-0
R/W-0
R/W-0
R/W-0
RSE5
TSE5
RSE12
TSE12
R/W-0
R/W-0
R/W-0
R/W-0
RSE4
TSE4
Preliminary
‘0’ = Bit is cleared
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
RSE11
TSE11
R/W-0
R/W-0
R/W-0
R/W-0
RSE3
TSE3
RSE10
TSE10
R/W-0
R/W-0
R/W-0
R/W-0
RSE2
TSE2
x = Bit is unknown
x = Bit is unknown
R/W-0
R/W-0
R/W-0
R/W-0
RSE9
RSE1
TSE9
TSE1
DS70593A-page 229
R/W-0
R/W-0
R/W-0
R/W-0
RSE8
RSE0
TSE8
TSE0
bit 8
bit 0
bit 8
bit 0

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