lpc11u23 NXP Semiconductors, lpc11u23 Datasheet - Page 15
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lpc11u23
Manufacturer Part Number
lpc11u23
Description
32-bit Arm Cortex-m0 Microcontroller; Up To 32 Kb Flash; Up To 10 Kb Sram And 4 Kb Eeprom; Usb Device; Usart
Manufacturer
NXP Semiconductors
Datasheet
1.LPC11U23.pdf
(70 pages)
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NXP Semiconductors
LPC11U2X
Product data sheet
7.5 Memory map
The LPC11U2x incorporates several distinct memory regions, shown in the following
figures.
program viewpoint following reset. The interrupt vector area supports address remapping.
The AHB (Advanced High-performance Bus) peripheral area is 2 MB in size and is divided
to allow for up to 128 peripherals. The APB (Advanced Peripheral Bus) peripheral area is
512 kB in size and is divided to allow for up to 32 peripherals. Each peripheral of either
type is allocated 16 kB of space. This addressing scheme allows simplifying the address
decoding for each peripheral.
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In-System Programming (ISP) and In-Application Programming (IAP) support for flash
IAP support for EEPROM
USB API
Power profiles for configuring power consumption and PLL settings
32-bit integer division routines
Figure 6
All information provided in this document is subject to legal disclaimers.
shows the overall map of the entire address space from the user
Rev. 2 — 13 January 2012
32-bit ARM Cortex-M0 microcontroller
LPC11U2x
© NXP B.V. 2012. All rights reserved.
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