str755fv1/ STMicroelectronics, str755fv1/ Datasheet - Page 49
str755fv1/
Manufacturer Part Number
str755fv1/
Description
Arm7tdmi-s?? 32-bit Mcu With Flash, Smi, 3 Std 16-bit Timers, Pwm Timer, Fast 10-bit Adc, I2c, Uart, Ssp, Usb And Can
Manufacturer
STMicroelectronics
Datasheet
1.STR755FV1.pdf
(84 pages)
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STR750Fxx STR751Fxx STR752Fxx STR755Fxx
PLL characteristics
Subject to general operating conditions for V
Table 24.
1. Data based on product characterisation, not tested in production.
2. Refer to jitter terminology in
3. The jitter specification holds true only up to 50mV (peak-to-peak) noise on V
4. The PLL parameters (MX1, MX0, PRESC1, PRESC2) must respect the constraints described
Internal RC oscillators (FREEOSC & LPOSC)
Subject to general operating conditions for V
Table 25.
∆t
∆t
∆t
f
f
CK_FREEOSC
CK_LPOSC
JITTER1
JITTER2
JITTER3
f
Jitter will increase if the noise is more than 50mV. In addition, it assumes that the input clock has no jitter.
characteristics on page
Symbol
Symbol
PLL_OUT
f
PLL_IN
t
f
LOCK
VCO
(2)(3)
(2)(3)
(2)(3)
PLL characteristics
Internal RC oscillators (FREEOSC & LPOSC)
FREEOSC Oscillator Frequency
LPOSC Oscillator Frequency
PLL input clock
PLL input clock duty cycle
PLL multiplier output clock
VCO frequency range
PLL lock time
Single period jitter (+/-3Σ peak
to peak)
Long term jitter (+/-3Σ peak to
peak)
Cycle to cycle jitter (+/-3Σ peak
to peak)
47.
Parameter
Parameter
: PLL characteristics on page 47
f
When PLL
operates (locked)
f
V
f
V
f
V
DD_IO
DD_IO
PLL_IN
PLL_IN
PLL_IN
PLL_IN
Test Conditions
DD_IO
DD_IO
DD_IO
Conditions
, and T
, and T
x 24
= 4 MHz
= 4 MHz
= 4 MHz
is stable
is stable
is stable
for details on how jitter is specified.
A
A
.
.
(4)
(4)
(4)
Min
150
3
Min
336
40
DDA_PLL
Typ
300
Electrical parameters
5
Typ
4.0
Value
and V
18
Max
500
Max
+/-250
+/-500
+/-2.5
8
supplies.
165
960
300
in: PLL
60
(1)
MHz
Unit
kHz
MHz
MHz
MHz
Unit
49/84
µs
ps
ps
ns
%
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