c8051t623-g Silicon Laboratories, c8051t623-g Datasheet - Page 98
c8051t623-g
Manufacturer Part Number
c8051t623-g
Description
Full Speed Usb Eprom Mcu Family
Manufacturer
Silicon Laboratories
Datasheet
1.C8051T623-G.pdf
(247 pages)
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SFR Definition 17.1. XBR0: Port I/O Crossbar Register 0
SFR Address = 0xE1
Name
Reset
Bit
7:4
Type
3
2
1
0
Bit
SYSCKE /SYSCLK Output Enable.
Unused
SMB0E
URT0E
SPI0E
Name
R
7
0
Unused. Read = 0000b. Write = don’t care.
The source of this signal is determined by the OUTCLK bit (see SFR Definition 16.1).
0: /SYSCLK unavailable at Port pin.
1: /SYSCLK output routed to Port pin.
SMBus I/O Enable.
0: SMBus I/O unavailable at Port pins.
1: SMBus I/O routed to Port pins.
SPI I/O Enable.
0: SPI I/O unavailable at Port pins.
1: SPI I/O routed to Port pins. Note that the SPI can be assigned either 3 or 4 GPIO
pins.
UART I/O Output Enable.
0: UART I/O unavailable at Port pin.
1: UART TX0, RX0 routed to Port pins P0.4 and P0.5.
R
6
0
R
5
0
C8051T622/3 and C8051T326/7
Rev. 1.1
R
4
0
Function
SYSCKE
R/W
3
0
SMB0E
R/W
2
0
SPI0E
R/W
1
0
URT0E
R/W
0
0
105
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