mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 242
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mc9s12q128
Manufacturer Part Number
mc9s12q128
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12Q128.pdf
(644 pages)
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Chapter 8 Analog-to-Digital Converter (ATD10B8C) Block Description
8.3.2.11
Read: Anytime
Write: Anytime
242
Module Base + 0x000D
IEN[7:0]
Reset
Field
7–0
W
R
IEN7
ATD Digital Input Enable on channel x (x = 7, 6, 5, 4, 3, 2, 1, 0) — This bit controls the digital input buffer from
the analog input pin (ANx) to PTADx data register.
0 Disable digital input buffer to PTADx
1 Enable digital input buffer to PTADx.
Note: Setting this bit will enable the corresponding digital input buffer continuously. If this bit is set while
ATD Input Enable Register (ATDDIEN)
0
7
simultaneously using it as an analog port, there is potentially increased power consumption because the
digital input buffer maybe in the linear region.
IEN6
0
6
Figure 8-13. ATD Input Enable Register (ATDDIEN)
Table 8-17. ATDDIEN Field Descriptions
IEN5
0
5
MC9S12Q128
IEN4
Rev 1.09
0
4
Description
IEN3
0
3
IEN2
0
2
Freescale Semiconductor
IEN1
0
1
IEN0
0
0
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