mc9s12q128 Freescale Semiconductor, Inc, mc9s12q128 Datasheet - Page 251
mc9s12q128
Manufacturer Part Number
mc9s12q128
Description
Hcs12 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S12Q128.pdf
(644 pages)
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Chapter 9
Clocks and Reset Generator (CRGV4) Block Description
9.1
This specification describes the function of the clocks and reset generator (CRGV4).
9.1.1
The main features of this block are:
Freescale Semiconductor
•
•
•
•
•
Phase-locked loop (PLL) frequency multiplier
— Reference divider
— Automatic bandwidth control mode for low-jitter operation
— Automatic frequency lock detector
— CPU interrupt on entry or exit from locked condition
— Self-clock mode in absence of reference clock
System clock generator
— Clock quality check
— Clock switch for either oscillator- or PLL-based system clocks
— User selectable disabling of clocks during wait mode for reduced power consumption
Computer operating properly (COP) watchdog timer with time-out clear window
System reset generation from the following possible sources:
— Power-on reset
— Low voltage reset
— COP reset
— Loss of clock reset
— External pin reset
Real-time interrupt (RTI)
Introduction
Refer to the device overview section for availability of this feature.
Features
MC9S12Q128
Rev 1.09
251
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