mcimx27- Freescale Semiconductor, Inc, mcimx27- Datasheet - Page 76

• Manufacturer Part Number: mcimx27-
• Description: Multimedia Applications Processor
• Manufacturer: Freescale Semiconductor, Inc

Signal Descriptions
76
1
SD11 and SD12 are determined by SDRAM controller register settings.
SD1
SD2
SD3
SD13
SD14
ID
ADDR
ID
RAS
CAS
SDCLK
SDCLK
WE
CS
SD6
SDRAM clock high-level width
SDRAM clock low-level width
SDRAM clock cycle time
SDR SDRAM CLK parameters are being measured from the 50%
point—that is, high is defined as 50% of signal value and low is defined as
50% of signal value.
The timing parameters are similar to the ones used in SDRAM data
sheets—that is,
are driven by the ESDCTL at the negative edge of SDCLK and the
parameters are measured at maximum memory frequency.
Data setup time
Data hold time
BA
Table 38. SDR SDRAM Write Timing Parameters (continued)
SD7
Parameter
Table 39. SDRAM Refresh Timing Parameters
Table 38
Figure 39. SDRAM Refresh Timing Diagram
SD11
Preliminary—Subject to Change Without Notice
Parameter
i.MX27 and i.MX27L Data Sheet, Rev. 1.2
indicates SDRAM requirements. All output signals
NOTE
SD10
Symbol
tCH
tCL
tCK
SD1
SD3
Symbol
tDH
tDS
SD2
Min
SD10
3.4
3.4
7.5
Min
2.0
1.3
ROW/BA
Freescale Semiconductor
Max
4.1
4.1
—
Max
—
—
Unit
Unit
ns
ns
ns
ns
ns