w78l812a Winbond Electronics Corp America, w78l812a Datasheet - Page 15
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w78l812a
Manufacturer Part Number
w78l812a
Description
8-bit Mcu Series 80c51-based
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W78L812A.pdf
(31 pages)
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6. ON-CHIP ROM CHARACTERISTICS
The W78L812 has several modes to program the on-chip ROM. All these operations are configured
by the pins RST, ALE, PSEN , A9CTRL (P3.0), A13CTRL (P3.1), A14CTRL (P3.2), OECTRL (P3.3),
and the D7 − D0 (P0.7 − P0.0) serve as the address and data bus respectively for these operations.
6.1
This operation is supported for customer to read their code and the Security bits. The data will not be
valid if the Lock bit is programmed to low.
6.2
When the OE is set to high, no data output appears on the D7… D0.
6.3
This operation is used to program the data to Flash EPROM and the security bits. Program operation
is done when the V
6.4
All the programming data must be checked after program operations. This operation should be
performed after each byte is programmed; it will ensure a substantial program margin.
6.5
An erase operation is the only way to change data from 0 to 1. This operation will erase all the Flash
EPROM cells and the security bits from 0 to 1. This erase operation is done when the V
V
6.6
After an erase operation, all of the bytes in the chip must be verified to check whether they have been
successfully erased to 1 or not. The erase verify operation automatically ensures a substantial erase
margin. This operation will be done after the erase operation if V
6.7
This operation allows parallel erasing or programming of multiple chips with different data. When P3.6
( CE ) = V
for the P3.6 and P3.7 pins, the individual chips may have common inputs.
CE (P3.6), OE (P3.7), A0 (P1.0) and V
OE is low.
EP
level, CE set to low, and OE set to high.
Read Operation
Output Disable Condition
Program Operation
Program Verify Operation
Erase Operation
Erase Verify Operation
Program/Erase Inhibit Operation
IH
, P3.7 ( OE ) = V
PP
is reach to V
IH
, erasing or programming of non-targeted chips is inhibited. So, except
CP
(12.5V) level, CE set to low, and OE set to high.
PP
( EA ). Moreover, the A15 − A0 (P2.7 − P2.0, P1.7 − P1.0)
- 15 -
Publication Release Date: November 6, 2006
W78LE812/W78L812A
PP
= V
EP
(14.5V), CE is high and
PP
Revision A9
is reach to