stm1403ctoq6f STMicroelectronics, stm1403ctoq6f Datasheet
stm1403ctoq6f
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stm1403ctoq6f Summary of contents
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Features ■ STM1403 supports FIPS-140 security level 3+ – Four high-impedance physical tamper inputs – Over/Under operating voltage detector – Security alarm (SAL) on tamper detection ■ Supervisory functions – Automatic battery switchover – RST output (open drain) – Manual ...
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Contents Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables Table 1. Device options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Summary description The STM1403 family of security supervisors are a low power family of intrusion (tamper) detection chips targeted at manufacturers of POS terminals and other systems, to enable them to meet physical and/or environmental intrusion monitoring requirements as mandated ...
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Figure 1. Logic diagram 1. V only for STM1403A; V REF 2. Normal mode: low when V battery. 3. SAL, RST, PFO, and BLD are open drain. Table 2. Signal names (1) Vccsw MR PFI ...
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... SAL, RST, PFO, and BLD are open drain only for STM1403A; V REF Figure 3. Block diagram V CC (1,2) BAT54J V BAT (1) MR PFI 1. BAT54J (from STMicroelectronics) recommended. 2. Required for battery-reverse charging protection. 3. Open drain 4. V only for STM1403; V REF 8/35 (2) ( BLD PFI ...
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Figure 4. Hardware hookup Regulator Unregulated Voltage 0.1μ Push-Button From Actuator Device (e.g., Switches, Wire Mesh) 1. Normal mode: low when V is internally switched to V OUT battery. 2. Capacitor (C) is typically ...
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Figure 6. Tamper Pin (TP open typical is 10MΩ. Resistors must be protected against conductive materials. Figure 7. Tamper Pin (TP closed typical is 10MΩ. Resistors must be protected against conductive materials. Figure 8. Tamper Pin ...
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Pin descriptions See Figure 1: Logic diagram connected to this device. SAL, Security alarm output (open drain) This signal can be generated when ANY of the following conditions occur: ● V > where V INT ...
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STM1403A (V operate in normal mode; 2. STM1403B (V High when this occurs; and 3. STM1403C (V High when this occurs. BLD, V low voltage detect output (open drain) BAT This is an internally loaded test of the battery, ...
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... BAT This is the secondary (backup battery) supply voltage. The pin is connected to the positive terminal of the battery with a rectifying diode like the BAT54J from STMicroelectronics for reverse charge protection. Voltage at this pin, after diode rectification, will be approximately 0.2V less than the battery voltage, and will depend on the type of battery used as well as the I being drawn. (A capacitor of at least 1.0µ ...
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Operation Reset input The STM1403 Security Supervisor asserts a reset signal to the MCU whenever V below the reset threshold (V RST is guaranteed logic low for 0V < back-up battery, RST is guaranteed valid ...
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Table 3. I/O status in battery back-up Pin V Connected to V OUT V Disconnected from V CC PFI Disabled PFO Logic low MR Disabled RST Logic low V Connected to V BAT Vccsw Logic high V Pulled to V ...
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... In addition to transients that are caused by normal SRAM operation, power cycling can generate negative voltage spikes on V one volt. These negative spikes can cause data corruption in the SRAM while in battery backup mode. To protect from these voltage spikes, STMicroelectronics recommends connecting a schottky diode from V Schottky diode 1N5817 is recommended for through hole and MBRS120T3 is recommended for surface mount ...
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Tamper detection Physical There are four (4) high-impedance physical tamper detect input pins, 2 normally set to High (NH) and 2 normally set to Low (NL). Each input is designed with a glitch immunity (see Table 7 on page 29). ...
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Typical operating characteristics Note: Typical values are at T Figure 11. V BAT 220 200 180 160 140 120 100 –60 Figure 12. Supply current vs. temperature (no load –50 –40 18/35 = ...
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Figure 13. V threshold vs. temperature PFI 1.255 1.250 1.245 1.240 1.235 1.230 1.225 –50 –30 –10 Figure 14. Reset comparator propagation delay vs. temperature –60 –40 –20 Figure 15. Power-up t ...
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Figure 16. Normalized Reset Threshold vs. Temperature 1.002 1.000 0.998 0.996 0.994 Figure 17. PFI to PFO propagation delay vs. temperature –60 –40 Figure 18. RST output voltage vs. supply ...
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Figure 19. RST response time (assertion) 4.0 3.0 2.0 1.0 0.0 Figure 20. Power-fail comparator response time (assertion) 4.0 3.0 2.0 PFI 1.0 0.0 Figure 21. Power-fail comparator response time (de-assertion) 4.0 3.5 3.0 2.5 2.0 1.5 PFI 1.0 0.5 ...
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Figure 22 reset propagation delay vs. temperature –60 Figure 23. Maximum transient duration vs. reset threshold overdrive 250 200 150 100 22/35 –40 – ...
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... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 4. ...
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DC and AC parameters This section summarizes the operating measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics Tables that follow, are derived from tests performed under the Measurement Conditions ...
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Figure 27. STM1403 switchover diagram, condition 3.3V V BAT 2.4V Table 6. DC and AC characteristics Alter- Sym Description native Operating voltage (2) V BAT V supply current CC ...
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Table 6. DC and AC characteristics (continued) Alter- Sym native I Output leakage current LO V Input high voltage (MR Input low voltage (MR) IL Output low voltage (PFO RST, Vccsw, SAL, BLD) V Output low ...
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Table 6. DC and AC characteristics (continued) Alter- Sym Description native V battery back- OHB (Vccsw) Pull-up supply voltage (open drain) Power-fail comparator V PFI input threshold PFI PFI hysteresis PFI to PFO propagation t PFD delay Battery ...
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Table 6. DC and AC characteristics (continued) Alter- Sym native Reset thresholds V RST Reset threshold (9) t RST pulse width rec Push-button Reset Input pulse width MLMH RST output delay MLRL ...
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Table 7. Physical and environmental tamper detection levels Sym Parameter V Over voltage trip level HV V Under voltage trip level LV SAL propagation delay time (after over/under voltage detection) Trip point for NH physical V HTP Tamper Input pins ...
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Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box ...
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Table 8. QFN16 – 16-lead, quad, flat package, no lead, 3x3mm body size, mechanical data Symb Typ A 0.90 A1 0.02 A3 0.20 b 0.25 D 3.00 D2 1.70 E 3.00 E2 1.70 e 0.50 K 0.20 L 0.40 ddd ...
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Part numbering Table 9. Ordering information scheme (see Example: Device Type STM1403: Physical, Voltage Tamper Detect V Status (SAL = Active-Low) OUT ON; Vccsw = Normal Mode OUT ( High-Z; Vccsw = High ...
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Figure 30. Topside marking information 1. Options codes (for V ) OUT (for Reset Threshold (for Battery Low Voltage Detect Threshold) 2. ...
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Revision history Table 10. Document revision history Date Version 11-Oct-2004 1.0 26-Nov-2004 1.1 22-Dec-2004 1.2 03-Feb-2005 1.3 25-Feb-2005 1.4 06-May-2005 1.5 05-Aug-2005 2.0 18-Oct-2005 3.0 07-Feb-2007 4.0 34/35 Description First edition Corrected footprint dimensions; update characteristics (Figure ...
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... Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...