x5083s8izt2 Intersil Corporation, x5083s8izt2 Datasheet - Page 7
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x5083s8izt2
Manufacturer Part Number
x5083s8izt2
Description
Cpu Supervisor With 8kbit Spi Eeprom
Manufacturer
Intersil Corporation
Datasheet
1.X5083S8IZT2.pdf
(21 pages)
- Current page: 7 of 21
- Download datasheet (321Kb)
Emax = Maximum Desired Error
Old V
New V
7
CC
CC
Applied + Error
Applied =
FIGURE 4. V
Error ≤ –Emax
NO
TRIP
Set V
PROGRAMMING SEQUENCE
X5083
(V
V
TRIP
Apply 5V to V
Decrement V
CC
Measured V
CC
Desired V
goes active?
Desired V
Reset V
RESET pin
Sequence
Sequence
Set V
= V
Execute
Execute
Programming
= V
DONE
CC
CC
TRIP
YES
- 50mV)
–Emax < Error < Emax
TRIP
Applied =
TRIP
TRIP
TRIP
CC
CC
-
Error ≥ Emax
Old V
New V
CC
Reset V
Sequence
CC
Execute
Applied - Error
Applied =
TRIP
June 15, 2006
FN8127.3
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