xr16v2651im Exar Corporation, xr16v2651im Datasheet - Page 51

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xr16v2651im

Manufacturer Part Number
xr16v2651im
Description
High Performance Duart With 32-byte Fifo And Powersave
Manufacturer
Exar Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
xr16v2651im-F
Manufacturer:
Exar Corporation
Quantity:
10 000
REV. 1.0.2
ABSOLUTE MAXIMUM RATINGS ................................................................................. 38
TYPICAL PACKAGE THERMAL RESISTANCE DATA (MARGIN OF ERROR: ± 15%) 38
ELECTRICAL CHARACTERISTICS............................................................................... 38
TABLE OF CONTENTS .....................................................................................................
DC E
AC E
P
P
R
ACKAGE
ACKAGE
4.4 INTERRUPT STATUS REGISTER (ISR) - READ-ONLY .................................................................................. 27
4.5 FIFO CONTROL REGISTER (FCR) - WRITE-ONLY ........................................................................................ 28
4.6 LINE CONTROL REGISTER (LCR) - READ/WRITE ........................................................................................ 29
4.7 MODEM CONTROL REGISTER (MCR) OR GENERAL PURPOSE OUTPUTS CONTROL - READ/WRITE . 31
4.8 LINE STATUS REGISTER (LSR) - READ ONLY.............................................................................................. 32
4.9 MODEM STATUS REGISTER (MSR) - READ ONLY ....................................................................................... 33
4.10 SCRATCH PAD REGISTER (SPR) - READ/WRITE ....................................................................................... 34
4.11 BAUD RATE GENERATOR REGISTERS (DLL, DLM AND DLD) - READ/WRITE ....................................... 34
4.12 DEVICE IDENTIFICATION REGISTER (DVID) - READ ONLY....................................................................... 34
4.13 DEVICE REVISION REGISTER (DREV) - READ ONLY................................................................................. 35
4.14 ENHANCED FEATURE REGISTER (EFR) ..................................................................................................... 35
TA = -40o to +85oC, Vcc is 2.25V to 3.6V ............................................................................................................. 38
Unless otherwise noted: TA = -40o to +85oC, Vcc=2.25 - 3.63V, 70 pF load where applicable.............................. 39
EVISION
T
T
T
T
T
T
F
F
F
F
F
F
F
F
F
F
F
F
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
LECTRICAL
LECTRICAL
4.3.1 IER VERSUS RECEIVE FIFO INTERRUPT MODE OPERATION ............................................................................... 25
4.3.2 IER VERSUS RECEIVE/TRANSMIT FIFO POLLED MODE OPERATION.................................................................. 26
4.4.1 INTERRUPT GENERATION: ........................................................................................................................................ 27
4.4.2 INTERRUPT CLEARING: ............................................................................................................................................. 27
4.14.1 SOFTWARE FLOW CONTROL REGISTERS (XOFF1, XOFF2, XON1, XON2) - READ/WRITE .............................. 36
11: I
12: T
13: P
14: S
15: S
16: UART RESET CONDITIONS FOR CHANNEL A AND B ............................................................................................ 37
13. C
14. M
15. 16 M
16. 16 M
17. 68 M
18. 68 M
19. R
20. T
21. R
22. R
23. T
24. T
H
D
D
IMENSIONS
IMENSIONS
ISTORY
NTERRUPT
RANSMIT AND
ARITY SELECTION
AMPLING
OFTWARE
RANSMIT
RANSMIT
RANSMIT
LOCK
ECEIVE
ECEIVE
ECEIVE
ODEM
C
C
ODE
ODE
ODE
ODE
HARACTERISTICS
HARACTERISTICS
T
..................................................................................................................................... 49
I
IMING
NPUT
R
R
R
R
HIGH PERFORMANCE DUART WITH 32-BYTE FIFO AND POWERSAVE FEATURE
(I
(I
(M
(M
S
F
R
R
R
EADY
EADY
EADY
ATE
NTEL
NTEL
OURCE AND
LOW
EADY
EADY
EADY
(32
(48
OTOROLA
OTOROLA
R
/O
............................................................................................................................................................. 40
S
ECEIVE
) D
) D
UTPUT
& I
& I
& I
C
ELECT
PIN
PIN TQFP
& I
& I
& I
........................................................................................................................................................ 31
ONTROL
ATA
ATA
NTERRUPT
NTERRUPT
NTERRUPT
NTERRUPT
NTERRUPT
NTERRUPT
) D
) D
QFN - 5
FIFO T
T
B
B
P
............................................................................................................................................... 34
IMING
ATA
ATA
US
US
RIORITY
F
............................................................................................................. 38
............................................................................................................. 39
UNCTIONS
R
W
B
B
- 7
EAD
T
T
T
RIGGER
RITE
US
US
F
T
T
T
IMING
IMING
IMING
OR
IMING
IMING
IMING
X
X
L
R
W
T
EVEL
T
C
EAD
5
IMING
7
RITE
IMING
HANNELS
[N
[FIFO M
[FIFO M
X
X
T
........................................................................................................................ 35
[N
[FIFO M
[FIFO M
ABLE AND
ON
T
0.9
1
..................................................................................................................... 28
T
................................................................................................................... 41
IMING
ON
IMING
................................................................................................................. 42
-FIFO M
mm
-FIFO M
mm
ODE
ODE
A & B ................................................................................................. 41
.......................................................................................................... 42
) .................................................................................. 48
ODE
ODE
......................................................................................................... 43
) ............................................................................... 47
L
, DMA D
, DMA E
II
EVEL
ODE
, DMA M
, DMA M
ODE
]
S
FOR
]
ELECTION
FOR
NABLED
ISABLED
ODE
ODE
C
C
HANNELS
HANNELS
D
E
]
NABLED
]
ISABLED
FOR
FOR
.......................................................................... 29
C
A & B ......................................................... 43
C
A & B ....................................................... 44
HANNELS
]
HANNELS
]
FOR
FOR
C
C
HANNELS
HANNELS
A & B......................................... 45
A & B........................................ 44
A & B ............................ 46
A & B ........................... 45
XR16V2651
I

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