xr16c2552ij Exar Corporation, xr16c2552ij Datasheet - Page 7
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xr16c2552ij
Manufacturer Part Number
xr16c2552ij
Description
2.97v To 5.5v Dual Uart With 16-byte Fifo
Manufacturer
Exar Corporation
Datasheet
1.XR16C2552IJ.pdf
(36 pages)
xr
REV. 1.0.0
The CPU interface is 8 data bits wide with 3 address lines and control signals to execute data bus read and
write transactions. The 2552 data interface supports the Intel compatible types of CPUs and it is compatible to
the industry standard 16C550 UART. No clock (oscillator nor external clock) is required to operate a data bus
transaction. Each bus cycle is asynchronous using CS#, IOR# and IOW# signals. Both UART channels share
the same data bus for host operations. The data bus interconnections are shown in
.
The RESET input resets the internal registers and the serial interface outputs in both channels to their default
state (see the
function in the device.
The UART provides the user with the capability to bi-directionally transfer information between an external
CPU and an external serial communication device. A logic 0 on chip select pin (CS#) allows the user to select
the UART and then using the channel select (CHSEL) pin, the user can select channel A or B to configure,
send transmit data and/or unload receive data to/from the UART. Individual channel select functions are shown
in
2.0 FUNCTIONAL DESCRIPTIONS
2.1
2.2
2.3
Table
F
CPU Interface
Device Reset
Channel A and B Selection
1.
IGURE
UART_CHSEL
UART_RESET
Pins in parentheses become available through the MF# pin. MF# A/B becomes RXRDY# A/B when AFR[2:1] = '10'. MF# A/B becomes OP2# A/B
when AFR[2:1] = '00'. MF# A/B becomes BAUDOUT# A/B when AFR[1:0] = '01'.
Table
UART_INTA
UART_INTB
UART_CS#
(RXRDYA#)
(RXRDYB#)
3.
TXRDYA#
TXRDYB#
IOW #
IOR#
XR16C2552 D
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
11). An active high pulse of longer than 40 ns duration will be required to activate the reset
CS#
1
0
0
ATA
T
ABLE
B
US
I
CHSEL
NTERCONNECTIONS
1: C
X
1
0
HANNEL
7
A
IOR#
IOW#
CHSEL
RESET
INTA
INTB
TXRDYA#
(RXRDYA#)
TXRDYB#
(RXRDYB#)
D0
D1
D2
D3
D4
D5
D6
D7
CS#
A0
A1
A2
2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO
AND
Channel A selected
Channel B selected
UART de-selected
B S
F
UNCTION
Channel A
Channel B
UART
UART
ELECT
(BAUDOUTA#)
(BAUDOUTB#)
(OP2A#)
(OP2B#)
DTRA#
DSRA#
DSRB#
RTSA#
CTSA#
DTRB#
RTSB#
CTSB#
CDA#
CDB#
GND
RIA#
VCC
TXA
RXA
RIB#
TXB
RXB
VCC
Serial Interface of
Serial Interface of
RS-232, RS-485
RS-232, RS-485
Figure
3.
2750int
XR16C2552