xrt75r03 Exar Corporation, xrt75r03 Datasheet - Page 2

• Manufacturer Part Number: xrt75r03
• Description: Xrt75r03 -multi-channel Line Interface Unit Liu Family Desynchronizer And Jitter Attenuator With R3 Technologytm
• Manufacturer: Exar Corporation

XRT75R03
REV. 1.0.8
TRANSMIT INTERFACE CHARACTERISTICS
RECEIVE INTERFACE CHARACTERISTICS
F
IGURE
Accepts either Single-Rail or Dual-Rail data from Terminal Equipment and generates a bipolar signal to the
line
Integrated Pulse Shaping Circuit
Built-in B3ZS/HDB3 Encoder (which can be disabled)
Accepts Transmit Clock with duty cycle of 30%-70%
Generates pulses that comply with the ITU-T G.703 pulse template for E3 applications
Generates pulses that comply with the DSX-3 pulse template, as specified in Bellcore GR-499
ANSI T1.102_1993
Generates pulses that comply with the STSX-1 pulse template, as specified in Bellcore GR-253-CORE
Transmitter can be turned off in order to support redundancy designs
Integrated Adaptive Receive Equalization (optional) for optimal Clock and Data Recovery
Declares and Clears the LOS defect per ITU-T G.775 requirements for E3 and DS3 applications
Meets Jitter Tolerance Requirements, as specified in ITU-T G.823_1993 for E3 Applications
Meets Jitter Tolerance Requirements, as specified in Bellcore GR-499-CORE for DS3 Applications
Declares Loss of Signal (LOS) and Loss of Lock (LOL) Alarms
Built-in B3ZS/HDB3 Decoder (which can be disabled)
Recovered Data can be muted while the LOS Condition is declared
Outputs either Single-Rail or Dual-Rail data to the Terminal Equipment
1. B
STS-1/DS3_(n)
REQEN_(n)
MRing_(n)
RRing_(n)
HOST/HW
TRing_(n)
MTIP_(n)
RTIP_(n)
LOSTHR
DMO_(n)
TTIP_(n)
LLB_(n)
LOCK
RESET
SR/DR
Notes: 1. (n) = 0, 1 or 2 for respective Channels
E3_(n)
SClk
SDO
SDI
INT
CS
2. Serial Processor Interface input pins are shared by the three Channels in "Host" Mode and redefined in the "Hardware" Mode.
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
D
IAGRAM OF THE
LoopBack
Processor
Interface
Local
Serial
Monitor
Device
Equalizer
Driver
AGC/
Line
Peak Detector
XRT 75R03
Shaping
Control
Pulse
Slicer
Tx
Tx
Detector
LOS
Clock & Data
Control
Timing
Recovery
XRT75R03
XRT75R03
Channel 0
2
Channel 1
Channel 2
Attenuator
Synthesizer
Attenuator
Jitter
Clock
Jitter
LoopBack
Remote
MUX
MUX
Encoder
Decoder
Invert
HDB3/
B3ZS
HDB3/
B3ZS
xr
xr
xr
xr
E3Clk,DS3Clk,
RLOL_(n)
RxON
RxClkINV
RPOS_(n)
RNEG_(n)/
LCV_(n)
RLB_(n)
RLOS_(n)
JATx/Rx
TPData_(n)
TNData_(n)
TxClk_(n)
TAOS_(n)
TxLEV_(n)
TxON_(n)
RxClk_(n)
CLKOUT
STS-1Clk
-CORE
and