xrt75r03 Exar Corporation, xrt75r03 Datasheet - Page 48
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xrt75r03
Manufacturer Part Number
xrt75r03
Description
Xrt75r03 -multi-channel Line Interface Unit Liu Family Desynchronizer And Jitter Attenuator With R3 Technologytm
Manufacturer
Exar Corporation
Datasheet
1.XRT75R03.pdf
(92 pages)
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XRT75R03
REV. 1.0.8
The Clock and Data Recovery Circuit extracts the embedded clock, RxClk_n from the sliced digital data stream
and provides the retimed data to the B3ZS (HDB3) decoder.
The Clock Recovery PLL can be in one of the following two modes:
Training Mode:
In the absence of input signals at RTIP_n and RRing_n pins, or when the frequency difference between the
recovered line clock signal and the reference clock applied on the ExClk_n input pins exceed 0.5%, a Loss of
Lock condition is declared by toggling RLOL_n output pin “High” (in Hardware Mode) or setting the RLOL_n bit
to “1” in the control registers (in Host Mode). Also, the clock output on the RxClk_n pins are the same as the
reference clock channel.
F
6.2
IGURE
Signal Source
2
17.184mHz
Sine Wave
Generator
23
19. I
-1 PRBS
Clock and Data Recovery:
NTERFERENCE
STS-1
M
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
DS3
E3
ODE
N
S
Attenuator 1
M
ARGIN
T
ABLE
C
ABLE
T
EST
9: I
L
S
ENGTH
NTERFERENCE
ET UP FOR
225 feet
450 feet
225 feet
450 feet
12 dB
0 feet
0 feet
Attenuator 2
0 dB
(A
TTENUATION
E3.
45
M
ARGIN
)
∑
Cable Simulator
T
EST
R
I
NTERFERENCE
ESULTS
Equalizer “IN”
-18.5 dB
-17.5 dB
-14 dB
-19 gB
-17 dB
-15 dB
-14 dB
-14 dB
T
OLERANCE
(XRT75R03)
DUT
xr
xr
xr
xr
Equipment
Test