wm9714l Wolfson Microelectronics plc, wm9714l Datasheet - Page 68
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wm9714l
Manufacturer Part Number
wm9714l
Description
Ac?97 Audio Codec
Manufacturer
Wolfson Microelectronics plc
Datasheet
1.WM9714L.pdf
(119 pages)
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WM9714L
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Table 50 Returning AUX ADC Data Through an AC-Link Time Slot
MASK INPUT CONTROL
Sources of glitch noise, such as the signals driving an LCD display, may feed through to the AUX
ADC inputs and affect measurement accuracy. In order to minimise this effect, a signal may be
applied to MASK (pin 47 / pin 3) to delay or synchronise the sampling of any input to the ADC. The
effect of the MASK signal depends on the the MSK bits of register 78h (bits [7:6]), as described
below.
Table 51 MASK Input Control
Table 52 Controlling the MASK Feature
Note that pin 47 / pin 3 can also be used as a GPIO (see “GPIO and Interrupt Control” section), or to
output the ADA signal (see below).
THE ADA SIGNAL
Whenever data becomes available from the AUXADC, the internal ADA (ADC Data Available) signal
goes high and remains high until the data has been read from register 7Ah (if SLEN = 0) or until it
has been sent out on an AC-Link slot (if SLEN = 1).
ADA goes high after every AUXADC conversion (in normal mode, COO=0)
ADA can be used to generate an interrupt, if the AW bit (register 52h, bit 12) is set (see “GPIO and
interrupt control” section)
It is also possible to output the ADA signal on pin 47 / pin 3, if this pin is not used as a GPIO. The
GE4/6 bit must be set to ‘0’ to achieve this (see “GPIO and interrupt control” section).
Alternatively, ADA can be read from bit 12 in register 54h.
76h
78h
REGISTER
REGISTER
MSK[1-0]
ADDRESS
ADDRESS
00
01
10
11
Mask has no effect on conversions GPIO input disabled (default)
Static; ‘hi’ on MASK pin stops conversions, ‘lo’ has no effect.
Edge triggered; rising or falling edge on MASK pin delays conversions
by an amount set in the DEL[3-0] register. Conversions are asynchronous to the
MASK signal.
Synchronous mode; conversions wait until rising or falling edge on MASK initiates
cycle; screen starts to be driven when the edge arrives, the conversion sample
being taken a period set by DEL[3-0] after the edge.
3
2:0
7:6
BIT
BIT
SLEN
SLT
MSK
LABEL
LABEL
EFFECT OF SIGNAL ON MASK PIN
0
110
00
DEFAULT
DEFAULT
Slot Readback Enable Control
0 = Disabled (readback through register map
only)
1 = Enabled (readback slot selected by SLT)
AC’97 Slot for AUXADC Data Control
000 = Slot 5
001 = Slot 6
010 = Slot 7
011 = Slot 8
100 = Slot 9
101 = Slot 10
110 = Slot 11
111 = Reserved
Mask Input Control
see Table 52 for details
DESCRIPTION
DESCRIPTION
PP, Rev 3.2, October 2008
Pre-Production
68