pacvga203 California Micro Devices Corporation, pacvga203 Datasheet - Page 7

• Manufacturer Part Number: pacvga203
• Description: Vga Port Companion Circuit
• Manufacturer: California Micro Devices Corporation

Application Information
A resistor may be necessary between the V
required while the PACVGA203 is in the power-down state. The value of this resistor should be chosen such that
the extra charge deposited into the V
ESD pulse occurs. The maximum ESD repetition rate specified by the IEC-61000-4-2 standard is one pulse per
second. When the PACVGA203 is in the power-up state, an internal discharge resistor is connected to ground via
an FET switch for this purpose.
For the same reason, V
are no other components in the system to provide a discharge path to ground.
GNDA, the reference voltage for the 75Ω resistors is not connected internally to GNDD and should ideally be con-
nected to the ground of the video DAC IC.
© 2004 California Micro Devices Corp. All rights reserved.
12/07/04
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
VF** - VIDEO EMI Filter
SF** - SYNC EMI Filter
SR* - external resistor to
match video cable
characteristic
impedance.
DDC_Data
DDC_Clk
H-Sync
V-Sync
Blue
Red
CC
Grn
1 and V
R1
DDC_V
R2
CC
CC
Figure 3. Typical Connection Diagram
4 may also require bypass capacitor discharging resistors to ground if there
CC
GNDD
3 bypass capacitor by each ESD pulse will be discharged before the next
0.2uF
16
17
19
21
10
8
9
3
4
5
CC
DDC_IN1
DDC_IN2
SYNC_IN1
SYNC_IN2
TERM_1
TERM_2
TERM_3
VIDEO_1
VIDEO_2
VIDEO_3
VIDEO_DAC_V
3 pin and ground if protection against a stream of ESD pulses is
12
V
G
CC
2 V
Tel: [phone]
GNDA
2
PACVGA203
CC
0.2uF
1
7
CC
0.2uF
V
14
GNDD
CC
SYNC_OUT1
SYNC_OUT2
DDC_OUT1
DDC_OUT2
3 V_BIAS
6
PWR_UP
13
V
SD2
GNDD
SD1
CC
G
4
0.2uF
1
11
24
15
18
20
22
23
Fax: [phone]
5V
SR*
SR*
G
PACVGA203
www.calmicro.com
DDC_Data
DDC_Clk
H-Sync
V-Sync
R
G
B
7