adum3100 Analog Devices, Inc., adum3100 Datasheet - Page 5

• Manufacturer Part Number: adum3100
• Description: Digital Isolator, Enhanced System-level Esd Reliability
• Manufacturer: Analog Devices, Inc.

ELECTRICAL SPECIFICATIONS, MIXED 5 V/3 V OR 3 V/5 V OPERATION
5 V/3 V operation: 4.5 V ≤ V
minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted. All typical specifications
are at T
Table 3.
Parameter
DC SPECIFICATIONS
SWITCHING SPECIFICATIONS
Input Supply Current, Quiescent
Output Supply Current
Input Supply Current, 25 Mbps
Output Supply Current
Input Supply Current, 50 Mbps
Output Supply Current
Input Currents
Logic High Output Voltage, 5 V/3 V Operation
Logic Low Output Voltage, 5 V/3 V Operation
Logic High Output Voltage, 3 V/5 V Operation
Logic Low Output Voltage, 3 V/5 V Operation
For ADuM3100AR
For ADuM3100BR
For All Grades
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
5 V/3 V Operation
3 V/5 V Operation
Minimum Pulse Width
Maximum Data Rate
Minimum Pulse Width
Maximum Data Rate
Propagation Delay Time to Logic Low/
High Output
Pulse-Width Distortion, |t
A
5 V/3 V Operation (See Figure 8)
3 V/5 V Operation (See Figure 9)
5 V/3 V Operation
3 V/5 V Operation
= 25°C, V
5, 6
DD1
= 3.3 V, V
2
2
2
4
4
, Quiescent
, 25 Mbps
, 50 Mbps
3
3
DD1
PLH
DD2
≤ 5.5 V, 3.0 V ≤ V
− t
PHL
= 5 V or V
|
6
DD1
= 5 V, V
DD2
≤ 3.6 V. 3 V/5 V operation: 3.0 V ≤ V
Symbol
I
I
I
I
I
I
I
V
V
V
V
PW
PW
t
PWD
DDI (Q)
DDO (Q)
DDI (25)
DDO (25)
DDI (50)
DDO (50)
IA
PHL,
OH
OL
OH
OL
t
DD2
PLH
Rev. A | Page 5 of 16
= 3.3 V.
Min
–10
V
V
V
V
25
50
DD2
DD2
DD2
DD2
– 0.1
– 0.5
– 0.1
– 0.8
Typ
1.3
0.7
0.1
0.15
3.2
2.6
0.4
0.6
5.5
4.6
0.7
1.1
+0.01
3.3
3.0
0.0
0.04
0.3
5.0
4.6
0.0
0.03
0.3
13
16
0.5
0.5
Max
1.8
0.9
0.2
0.25
4.5
3.4
0.8
1.1
8.0
6.6
1.7
1.6
+10
0.1
0.1
0.4
0.1
0.1
0.8
40
20
21
26
2
3
DD1
≤ 3.6 V, 4.5 V ≤ V
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
μA
V
V
V
V
V
V
V
V
V
V
ns
Mbps
ns
Mbps
ns
ns
ns
ns
1
Test Conditions
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
12.5 MHz logic signal freq.
25 MHz logic signal freq.
25 MHz logic signal freq.
25 MHz logic signal freq.
25 MHz logic signal freq.
0 ≤ V
V
I
I
I
I
I
I
I
I
I
I
C
C
C
C
C
C
C
C
O
O
O
O
O
O
O
O
O
O
DD1
L
L
L
L
L
L
L
L
= –20 μA, V
= –2.5 mA, V
= 20 μA, V
= 400 μA, V
= 2.5 mA, V
= –20 μA, V
= –4 mA, V
= 20 μA, V
= 400 μA, V
= 4 mA, V
DD2
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
= 15 pF, CMOS signal levels
or V
IA
≤ 5.5 V. All
, V
IB
DD2
, V
ADuM3100
I
IC
I
I
= V
I
= V
= V
, V
I
I
I
I
I
= V
= V
= V
= V
= V
= V
I
ID
= V
IL
IL
IL
IH
≤
IH
IL
IL
IH
IL
IH