ht82k95e Holtek Semiconductor Inc., ht82k95e Datasheet - Page 16

• Manufacturer Part Number: ht82k95e
• Description: Ht82k95e/ht82k95a -- Usb Multimedia Keyboard Encoder 8-bit Mcu
• Manufacturer: Holtek Semiconductor Inc.

of TMR0C/TMR1C) should be set to 1. In the pulse width
measurement mode, the TON will be cleared automati-
cally after the measurement cycle is completed. But in
the other two modes the TON can only be reset by in-
structions. The overflow of the Timer/Event Counter 0/1
is one of the wake-up sources. No matter what the oper-
ation mode is, writing a 0 to ET0I/ET1I can disable the
corresponding interrupt services.
In the case of Timer/Event Counter 0/1 OFF condition,
writing data to the Timer/Event Counter 0/1 preload reg-
ister will also reload that data to the Timer/Event Coun-
ter 0/1. But if the Timer/Event Counter 0/1 is turned on,
data written to it will only be kept in the Timer/Event
Counter 0/1 preload register. The Timer/Event Counter
0/1 will still operate until overflow occurs (a Timer/Event
Counter 0/1 reloading will occur at the same time).
W h e n t h e Ti m e r / E v e n t C o u n t e r 0 / 1 ( r e a d i n g
TMR0/TMR1) is read, the clock will be blocked to avoid
errors. As clock blocking may results in a counting error,
this must be taken into consideration by the program-
mer.
Input/Output Ports
There are 32 bidirectional input/output lines in the
microcontroller, labeled from PA to PD, which are
mapped to the data memory of [12H], [14H], [16H] and
[18H] respectively. All of these I/O ports can be used for
input and output operations. For input operation, these
ports are non-latching, that is, the inputs must be ready
at the T2 rising edge of instruction MOV A,[m] (m=12H,
14H, 16H or 18H). For output operation, all the data is
latched and remains unchanged until the output latch is
rewritten.
Each I/O line has its own control register (PAC, PBC,
PCC, PDC) to control the input/output configuration.
With this control register, CMOS/NMOS/PMOS output
Rev. 2.00
Input/Output Ports
16
or Schmitt trigger input with or without pull-high resistor
structures can be reconfigured dynamically under soft-
ware control. To function as an input, the corresponding
latch of the control register must write a 1 . The input
source also depends on the control register. If the con-
trol register bit is 1 , the input will read the pad state. If
the control register bit is 0 , the contents of the latches
will move to the internal bus. The latter is possible in the
CMOS/NMOS/PMOS configurations can be selected
(NMOS and PMOS are available for PA only). These
control registers are mapped to locations 13H, 15H, 17H
and 19H.
After a chip reset, these input/output lines remain at high
levels or floating state (depending on the pull-high op-
tions). Each bit of these input/output latches can be set
or cleared by SET [m].i and CLR [m].i (m=12H, 14H,
16H or 18H) instructions.
Some instructions first input data and then follow the
output operations. For example, SET [m].i , CLR
[m].i , CPL [m] , CPLA [m] read the entire port states
into the CPU, execute the defined operations
(bit-operation), and then write the results back to the
latches or the accumulator.
Each line of all the I/O ports have the capability of wak-
ing up the device.
There are pull-high (PA only) options available for I/O
lines. Once the pull-high option of an I/O line is selected,
the I/O line have pull-high resistor. Otherwise, the
pull-high resistor is absent. It should be noted that a
non-pull-high I/O line operating in input mode will cause
a floating state.
It is recommended that unused or not bonded out I/O
lines should be set as output pins by software instruction
to avoid consuming power under input floating state.
read-modify-write instruction. For output function,
HT82K95E/HT82K95A
April 16, 2008