hn58x2508fpie Renesas Electronics Corporation., hn58x2508fpie Datasheet
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hn58x2508fpie Summary of contents
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HN58X2508I HN58X2516I Serial Peripheral Interface 8k EEPROM (1024-word × 8-bit) 16k EEPROM (2048-word × 8-bit) Electrically Erasable and Programmable Read Only Memory Description HN58X25xxx Series is the Serial Peripheral Interface compatible (SPI) EEPROM (Electrically Erasable and Programmable ROM). It realizes ...
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... HN58X2508I/HN58X2516I Ordering Information Type No. Internal organization 8-kbit (1024 × 8-bit) HN58X2508FPIE 16-kbit (2048 × 8-bit) HN58X2516FPIE 8-kbit (1024 × 8-bit) HN58X2508TIE 16-kbit (2048 × 8-bit) HN58X2516TIE Pin Arrangement V Pin Description Pin name C Serial clock D Serial data input Q Serial data output S Chip select ...
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HN58X2508I/HN58X2516I Block Diagram HOLD D Q Absolute Maximum Ratings Parameter Supply voltage relative Input voltage relative Operating temperature range* Storage temperature range Notes: 1. Including electrical ...
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HN58X2508I/HN58X2516I DC Characteristics Parameter Input leakage current Output leakage current V current Standby CC Active Output voltage Rev.3.00, Jul.05.2005, page Symbol Min Max I ...
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HN58X2508I/HN58X2516I AC Characteristics Test Conditions • Input pules levels: V × 0 V × 0 • Input rise and fall time: ≤ • Input and output timing reference ...
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HN58X2508I/HN58X2516I Parameter Clock frequency S active setup time S not active setup time S deselect time S active hold time S not active hold time Clock high time Clock low time Clock rise time Clock fall time Data in setup ...
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HN58X2508I/HN58X2516I Timing Waveforms Serial Input Timing S t CHSL C t DVCH D High Impedance Q Hold Timing HOLD Output Timing S C ADDR D LSB IN t CLQV t CLQX Q Rev.3.00, Jul.05.2005, page 7 ...
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HN58X2508I/HN58X2516I Pin Function Serial data output (Q) This output signal is used to transfer data serially out of the device. Data is shifted out on the falling edge of serial clock (C). Serial data input (D) This input signal is ...
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HN58X2508I/HN58X2516I Functional Description Status Register The following figure shows the Status Register Format. The Status Register contains a number of status and control bits that can be read or set (as appropriate) by specific instructions. Status Register Format b7 SRWD ...
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HN58X2508I/HN58X2516I Write Enable (WREN): The Write Enable Latch (WEL) bit must be set prior to each WRITE and WRSR instruction. The only way to do this is to send a Write Enable instruction to the device. As shown in the ...
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HN58X2508I/HN58X2516I Write Disable (WRDI): One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction to the device. As shown in the following figure, to send this instruction to the device, chip select (S) ...
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HN58X2508I/HN58X2516I Read Status Register (RDSR): The Read Status Register (RDSR) instruction allows the Status Register to be read. The Status Register may be read at any time, even while a Write or Write Status Register cycle is in progress. When ...
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HN58X2508I/HN58X2516I Write Status Register (WRSR): The Write Status Register (WRSR) instruction allows new values to be written to the Status Register. Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed. After the Write Enable ...
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HN58X2508I/HN58X2516I Read from Memory Array (READ): As shown in the following figure, to send this instruction to the device, chip select (S) is first driven low. The bits of the instruction byte and the address bytes are then shifted in, ...
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HN58X2508I/HN58X2516I Write to Memory Array (WRITE): As shown in the following figure, to send this instruction to the device, chip select (S) is first driven low. The bits of the instruction byte, address byte, and at least one data byte ...
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HN58X2508I/HN58X2516I Byte Write (WRITE) Sequence (Page ...
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HN58X2508I/HN58X2516I Data Protect The protection features of the device are summarized in the following table. When the Status Register Write Disable (SRWD) bit of the Status Register is 0 (its initial delivery state possible to write to the ...
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HN58X2508I/HN58X2516I Hold Condition The hold (HOLD) signal is used to pause any serial communications with the device without resetting the clocking sequence. During the hold condition, the serial data output (Q) is high impedance, and serial data input (D) and ...
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... HN58X2508I/HN58X2516I Package Dimensions HN58X2508FPIE/HN58X2516FPIE (PRSP0008DF-B / Previous Code: FP-8DBV) JEITA Package Code RENESAS Code P-SOP8-3.9x4.89-1.27 PRSP0008DF Index mark Rev.3.00, Jul.05.2005, page Previous Code MASS[Typ.] FP-8DBV 0.08g NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. ...
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HN58X2508I/HN58X2516I HN58X2508TIE/HN58X2516TIE (PTSP0008JC-B / Previous Code: TTP-8DAV) JEITA Package Code RENESAS Code P-TSSOP8-4.4x3-0.65 PTSP0008JC Index mark Rev.3.00, Jul.05.2005, page Previous Code MASS[Typ.] TTP-8DAV 0.034g ...
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Revision History Rev. Date Page 1.00 Jul.23.2004 Initial issue 2.00 Aug.19.2004 26-27 Package Dimensions: Change of Dimensions 2.01 Mar.31.2005 1 Description and Features 2 Ordering Information 19-20 Package Dimensions 3.00 Jul.05.2005 1 Features 5-6 AC Characteristics HN58X2508I/HN58X2516I Data Sheet ...
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Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead ...