hn58v1001 Renesas Electronics Corporation., hn58v1001 Datasheet
hn58v1001
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hn58v1001 Summary of contents
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... Ready/Busy and RES function Description 's Renesas Technology HN58V1001 is an electrically erasable and programmable ROM organized as 131072- word 8-bit. It has realized high speed, low power consumption and high reliability by employing advanced MNOS memory technology and CMOS process and circuitry technology. It also has a 128-byte page programming function to make the write operations faster ...
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... HN58V1001 Series Ordering Information Type No. Access time HN58V1001FP-25 250 ns HN58V1001T-25 250 ns HN58V1001FP-25E 250 ns HN58V1001T-25E 250 ns Pin Arrangement HN58V1001FP Series Busy RDY A15 31 A16 RES 3 A14 A12 29 5 A13 A11 ...
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... HN58V1001 Series Pin Description Pin name A0 to A16 I/ RDY/Busy RES Block Diagram V CC High voltage generator V SS RES OE CE Control logic and timing WE RES Address buffer and latch A7 to A16 Rev.8.00, Nov. 28. 2003, page Function ...
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... HN58V1001 Series Operation Table Operation Read Standby Write Deselect Write Inhibit V IL Data Polling Program reset Notes: 1. Refer to the recommended DC operating conditions Don’t care Absolute Maximum Ratings ...
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... HN58V1001 Series DC Characteristics ( + Parameter Symbol Min Input leakage current I LI Output leakage current I LO Standby V current I CC CC1 I CC2 Operating V current I CC CC3 Output low voltage V OL Output high voltage RES: 100 A (max) Notes Capacitance ...
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... HN58V1001 Series AC Characteristics ( + Test Conditions Input pulse levels (RES pin) CC Input rise and fall time Output load: 1TTL Gate +100 pF Reference levels for measuring timing: 0.8 V, 1.8 V Read Cycle Parameter Symbol Address to output delay t ACC ...
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... HN58V1001 Series Write Cycle Parameter Address setup time Address hold time CE to write setup time (WE controlled) CE hold time (WE controlled write setup time (CE controlled) WE hold time (CE controlled write setup time OE hold time Data setup time Data hold time WE pulse width (WE controlled) ...
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... HN58V1001 Series Timing Waveforms Read Timing Waveform Address CE OE High WE Data Out RES Rev.8.00, Nov. 28. 2003, page ACC Data out valid DFR ...
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... HN58V1001 Series Byte Write Timing Waveform (1) (WE Controlled) Address Din High-Z Busy RDY/ t RES RES V CC Rev.8.00, Nov. 28. 2003, page OES OEH t DW High-Z ...
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... HN58V1001 Series Byte Write Timing Waveform (2) (CE Controlled) Address Din High-Z Busy RDY/ t RES RES V CC Rev.8.00, Nov. 28. 2003, page OES t OEH High-Z ...
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... HN58V1001 Series Page Write Timing Waveform (1) (WE Controlled) *6 Address A0 to A16 OES Din t DB Busy High-Z RDY RES t RES V CC Rev.8.00, Nov. 28. 2003, page BLC t OEH ...
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... HN58V1001 Series Page Write Timing Waveform (2) (CE Controlled) *6 Address A0 to A16 OES Din t DB Busy High-Z RDY RES t RES V CC Rev.8.00, Nov. 28. 2003, page BLC t OEH ...
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... HN58V1001 Series Data Data Polling Timing Waveform Data Data Address OEH Din X I/O7 Rev.8.00, Nov. 28. 2003, page Dout OES t DW Dout X ...
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... HN58V1001 Series Toggle bit This device provide another function to determine the internal programming cycle. If the EEPROM is set to read mode during the internal programming cycle, I/O6 will charge from “1” to “0” (toggling) for each read. When the internal programming cycle is finished, toggling of I/O6 will stop and the device can be accessible for next read or program. Notes: 1. I/O6 beginning state is “ ...
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... HN58V1001 Series Software Data Protection Timing Waveform (1) (in protection mode Address 5555 Data AA Software Data Protection Timing Waveform (2) (in non-protection mode Address 5555 AAAA or 2AAA Data AA 55 Rev.8.00, Nov. 28. 2003, page BLC 5555 Write address AAAA or 2AAA ...
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... HN58V1001 Series Functional Description Automatic Page Write Page-mode write feature allows 1 to 128 bytes of data to be written into the EEPROM in a single write cycle. Following the initial byte cycle, an additional 1 to 127 bytes can be written in the same manner. Each additional byte load cycle must be started within 30 µs from the preceding falling edge CE. When kept high for 100 µ ...
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... HN58V1001 Series Write/Erase Endurance and Data Retention Time 4 The endurance is 10 cycles in case of the page programming and 10 (1% cumulative failure rate). The data retention time is more than 10 years when a device is page- 4 programmed less than 10 cycles. Data Protection To prevent this phenomenon, this device has a noise cancellation function that cuts noise if its width less in program mode ...
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... HN58V1001 Series 2. Data Protection at V On/Off CC When V is turned on or off, noise on the control pins generated by external circuits (CPU, etc) may act trigger and turn the EEPROM to program mode by mistake. To prevent this unintentional programming, the EEPROM must be kept in an unprogrammable state while the CPU unstable state ...
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... HN58V1001 Series 3. Software data protection To prevent unintentional programming, this device has the software data protection (SDP) mode. The SDP is enabled by inputting the following 3 bytes code and write data. SDP is not enabled if only the 3 bytes code is input. To program data in the SDP enable mode, 3 bytes code must be input before write data ...
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... HN58V1001 Series Package Dimensions HN58V1001FP Series (FP-32D, FP-32DV) 20.45 20.95 Max 32 1 1.00 Max 1.27 *0.40 ± 0.08 0.15 0.38 ± 0.06 *Dimension including the plating thickness Base material dimension Rev.8.00, Nov. 28. 2003, page 14.14 ± 0.30 0.10 M Package Code JEDEC JEITA Mass (reference value) Unit: mm 1.42 0 ˚ – 8 ˚ 0.80 ± 0.20 ...
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... HN58V1001 Series Package Dimensions (cont.) HN58V1001T Series (TFP-32DA, TFP-32DAV) 8.00 8.20 Max 0.50 *0.22 ± 0.08 0.08 0.20 ± 0.06 0.45 Max 0.10 *Dimension including the plating thickness Base material dimension Rev.8.00, Nov. 28. 2003, page 14.00 ± 0.20 Package Code JEDEC JEITA Mass (reference value) Unit: mm 0.80 0 ˚ – 5 ˚ ...
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... Deletion of Mode Description Addition of Reset function Change of erase/write cycles in page mode: 10 Change of erase/write cycles in byte mode Functional Description 3.0 Apr. 23. 1993 Addition of Toggle Bit HN58V1001 Series Data Sheet power +3V CC min max +0 ...
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... Nov.25. 1994 5 Capacitance Addition of note Characteristics Write cycle: Addition of note 2,3 Addition Page write timing waveform Addition of note: 1 5.0 May. 23. 1995 Deletion of HN58V1001R series (TFP-32DAR) 6.0 Apr. 30. 1997 Change of format 6 AC Characteristics Addition of note.7 8 Timing Waveforms Toggle bit Addition of note. Functional Description ...
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Sales Strategic Planning Div. Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble ...