as7c33512ft32a Alliance Memory, Inc, as7c33512ft32a Datasheet - Page 7
![no-image](/images/no-image-200.jpg)
as7c33512ft32a
Manufacturer Part Number
as7c33512ft32a
Description
3.3v 512k 32/36 Flow-through Synchronous Sram
Manufacturer
Alliance Memory, Inc
Datasheet
1.AS7C33512FT32A.pdf
(19 pages)
Synchronous truth table
1 X = don’t care, L = low, H = high
2 For WRITE, L means any one or more byte write enable signals (BWa, BWb, BWc or BWd) and BWE are LOW or GWE is LOW. WRITE = HIGH for all
BWx, BWE, GWE HIGH. See "Write enable truth table (per byte)," on page 6 for more information.
3
4 ZZ pin is always Low.
For write operation following a READ,
CE0
12/23/04, v 1.4
H
X
X
X
X
H
H
H
H
X
H
X
H
L
L
L
L
L
L
L
L
L
1
CE1
X
X
X
H
H
H
H
X
X
X
X
X
X
X
X
H
X
X
X
X
L
L
CE2
X
X
X
H
H
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
ADSP
[4]
X
H
H
H
H
H
H
H
H
X
X
X
X
H
H
X
H
X
L
L
L
L
OE
ADSC
must be high before the input data set up time and held high throughout the input hold time
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
ADV
X
X
X
X
X
X
X
X
X
H
H
H
H
X
H
H
L
L
L
L
L
L
Alliance Semiconductor
WRITE
X
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
[2]
OE
X
X
X
X
X
H
H
H
H
H
H
X
X
X
X
X
L
L
L
L
L
L
®
Address accessed
External
External
External
External
External
Current
Current
Current
Current
Current
Current
Next
Next
Next
Next
Next
Next
NA
NA
NA
NA
NA
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
L to H
CLK
AS7C33512FT32A
AS7C33512FT36A
Continue write
Continue write
Continue read
Continue read
Continue read
Continue read
Suspend write
Suspend write
Suspend read
Suspend read
Suspend read
Suspend read
Begin write
Begin read
Begin read
Begin read
Begin read
Operation
Deselect
Deselect
Deselect
Deselect
Deselect
7 of 19
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Hi−Z
Hi−Z
DQ
D
Q
Q
Q
Q
Q
Q
D
D
D
D
3