pc1600cl Infineon Technologies Corporation, pc1600cl Datasheet - Page 19

• Manufacturer Part Number: pc1600cl
• Description: Registered Ddr Sdram-modules
• Manufacturer: Infineon Technologies Corporation

Table 12
Parameter
Address and control input setup
time
Address and control input hold
time
Read preamble
Read preamble setup time
Read postamble
Active to Precharge command
Active to Active/Auto-refresh
command period
Auto-refresh to Active/Auto-
refresh command period
Active to Read or Write delay
Precharge command period
Active to Autoprecharge delay
Active bank A to Active bank B
command
Write recovery time
Auto precharge write recovery +
precharge time
Internal write to read command
delay
Exit self-refresh to non-read
command
Exit self-refresh to read
command
Average Periodic Refresh
Interval
1) 0 C
2) Input slew rate
3) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross: the input reference
4) Inputs are not recognized as valid until
5) The Output timing reference level, as measured at the timing reference point indicated in AC Characteristics (note 3) is
6) These parameters guarantee device timing, but they are not necessarily tested on each device.
7)
Data Sheet
level for signals other than CK/CK, is
t
to a specific voltage level, but specify when the device is no longer driving (HZ), or begins driving (LZ).
HZ
and
T
t
A
LZ
AC Timing - Absolute Specifications –8/–7/-7F
transitions occur in the same access time windows as valid data transitions. These parameters are not referred
70 C;
1 V/ns for DDR266a, DDR266F and = 1 V/ns for DDR200
V
DDQ
= 2.5 V
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
IS
IH
RPRE
RPRES
RPST
RAS
RC
RFC
RCD
RP
RAP
RRD
WR
DAL
WTR
XSNR
XSRD
REFI
0.2 V,
V
REF
V
V
REF
DD
. CK/CK slew rate are
Min. Max.
1.1
1.1
1.1
1.1
0.9
1.5
0.40 0.60
50
70
80
20
20
20
15
15
1
80
200 —
—
stabilizes.
= +2.5 V
DDR200
–8
—
—
—
—
1.1
—
120E+3 45
—
—
—
—
—
—
—
—
—
7.8
0.2 V
19
HYS72D[128/64/32]5[00/20/21]GR–[7F/7/8]-B
(
Min.
0.9
1.0
0.9
1.0
0.9
NA
0.40
65
75
20
20
20
15
15
1
75
200
—
t
wr
DDR266A
/
t
CK
1.0 V/ns.
) + (
–7
Max.
—
—
—
—
1.1
0.60
120E+3 45
—
—
—
—
—
—
—
—
—
—
7.8
t
Registered DDR SDRAM-Modules
rp
/
t
CK
)
Min. Max.
0.9
1.0
0.9
1.0
0.9
NA
0.40 0.60
65
75
20
20
20
15
15
1
75
200
—
DDR266F
–7F
—
—
—
—
1.1
—
120E+3
—
—
—
—
—
—
—
—
—
—
7.8
Electrical Characteristics
Unit Note/
ns
ns
ns
ns
t
t
ns
t
ns
ns
ns
ns
ns
ns
ns
t
t
ns
t
CK
CK
CK
CK
CK
CK
s
Rev. 1.03 2004-01
Test
Condition
fast slew rate
3)4)5)6)10)
3)4)5)6)10)
fast slew rate
3)4)5)6)10)
3)4)5)6)10)
CL > 1.5
2)3)4)5)11)
2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)
2)3)4)5)12)
CL > 1.5
2)3)4)5)
2)3)4)5)
2)3)4)5)13)
slow slew rate
slow slew rate
2)3)4)5)
2)3)4)5)
1)
V
TT
.