lb1876 Sanyo Semiconductor Corporation, lb1876 Datasheet - Page 3
![no-image](/images/manufacturer_photos/0/5/586/sanyo_semiconductor_corporation_sml.jpg)
lb1876
Manufacturer Part Number
lb1876
Description
Three-phase Brushless Motor Driver For Polygon Mirror Motors
Manufacturer
Sanyo Semiconductor Corporation
Datasheet
1.LB1876.pdf
(14 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LB1876
Manufacturer:
MOLEX
Quantity:
1 000
Continued from preceding page.
[Phase comparator output]
Output High level voltage
Output Low level voltage
Output source current
Output sink current
[Phase lock detector output]
Output saturation voltage
Output leak current
[ERR amplifier]
Input offset voltage
Input bias current
Ouput High level voltage
Ouput Low level voltage
DC bias level
[Current limiter]
Drive gain 1
Drive gain 2
Limiter voltage
[Thermal shutdown operation]
Termal shutdown operating temperature
Hysteresis width
[Low voltage protection]
Operating voltage
Hysteresis
[CLD circuit]
External capacitor charge current
Operating voltage
[CLK pin]
External input frequency
High level input voltage
Low level input voltage
Input open voltage
Hysteresis width
High level input current
Low level input current
[S/S pin]
High level input voltage
Low level input voltage
Input open voltage
Hysteresis width
High level input current
Low level input current
[LDSEL pin]
High level input voltage
Low level input voltage
Input open voltage
High level input current
Low level input current
[BRSEL pin]
High level input voltage
Low level input voltage
Input open voltage
High level input current
Low level input current
Parameter
V
V
V
V
V
V
V
V
V
I
V
I
I
I
I
V
VH(CLD)
I
V
V
I
V
fI(CKIN)
I
V
I
I
I
V
V
I
I
I
Symbol
VB(ER)
I
I
H(CKIN) VCKIN = VREG
V
I
I
H(LD
I
H(BR
L(BR
I
I
L(CKIN) VCKIN = 0 V
I
I
L(LD
O(BR
O(CKIN)
I
H(LD
O(LD
H(BR
VPDH
IL(LD)
I
H(CKIN)
S(CKIN)
L(LD
L(BR
VPDL
O
GDF1
GDF2
∆TSD
∆VSD
L(CKIN)
I
O
O
I
I
B
ICLD
I
IPD+
IPD–
I
I
H(SS)
O(ER)
VRF
TSD
VSD
I
L(SS)
H(SS)
O(SS)
S(SS)
L(SS)
H(ER) I
L(ER)
L(LD)
(ER)
SEL
SEL
SEL
SEL
SEL
SEL
SEL
SEL
SEL
SEL
) V
) V
) V
)
) V
)
)
)
)
)
I
I
VPD = VREG/2
VPD = VREG/2
ILD = 10 mA
V
Design target value
I
in phase lock mode
in unlock mode
V
Design target value (junction temperature)
Design target value (junction temperature)
VS/S = VREG
VS/S = 0 V
O
O
O
O
O
CC
LDSEL
LDSEL
LDSEL
LDSEL
H = –100 µA
H = 100 µA
H = –500 µA
L = 500 µA
= V
- V
CC
M
= VREG
= 0 V
= VREG
= 0 V
LB1876
Conditions
VREG–1.2
VREG-0.2
VREG-0.5
VREG-0.5
VREG-0.5
VREG-0.5
min
–280
–280
–280
–280
–5%
0.45
3.25
0.35
0.35
–10
150
–10
–10
–10
–10
1.5
0.4
0.8
8.1
0.2
0.1
3.5
3.5
3.5
3.5
–1
–6
0
0
0
0
VREG/2
VREG-0.1
VREG-0.9
Ratings
typ
–210
–210
–210
–210
0.15
0.35
–4.3
180
0.2
0.9
0.5
1.0
0.5
8.5
3.5
0.5
0.5
40
0
0
0
0
max
VREG
VREG
VREG
VREG
VREG
VREG
VREG
VREG
+5%
–0.5
0.55
3.75
0.65
0.65
+10
+10
+10
0.3
0.5
1.2
0.6
1.2
8.9
0.5
1.5
1.5
1.5
1.5
No. 6201-3/14
10
+1
–3
10
10
10
times
times
Unit
kHz
mA
mA
mV
µA
µA
°C
°C
µA
µA
µA
µA
µA
µA
µA
µA
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V