le75183 Zarlink Semiconductor, le75183 Datasheet - Page 7

• Manufacturer Part Number: le75183
• Description: Line Card Access Switch
• Manufacturer: Zarlink Semiconductor

ABSOLUTE MAXIMUM RATINGS
Stresses above those listed under Absolute Maximum Ratings can cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to absolute maximum ratings for extended periods may affect device reliability.
Note:
For LCAS in the QFN package, it is desirable that the exposed pad be soldered to an equally sized exposed copper surface (with no
further electrical connection such as VBAT or ground) for mechanical stability.
OPERATING RANGES
Package Assembly
Green package devices are assembled with enhanced, environmental compatible lead-free, halogen-free, and antimony-free
materials. The leads possess a matte-tin plating which is compatible with conventional board assembly processes or newer lead-
free board assembly processes. The peak soldering temperature should not exceed 245°C during printed circuit board assembly.
Refer to IPC/JEDEC J-Std-020B Table 5-2 for the recommended solder reflow temperature profile.
Environmental Ranges
Legerity guarantees the performance of this device over commercial (0 to 70º C) and industrial (-40 to 85ºC) temperature ranges
by conducting electrical characterization over each range and by conducting a production test with single insertion coupled to
periodic sampling. These characterization and test procedures comply with section 4.6.2 of Bellcore GR-357-CORE Component
Reliability Assurance Requirements for Telecommunications Equipment.
Electrical Ranges
*V
remain in this state until the battery voltage drops below typically –15 V.
*Applied voltage is 100 Vp-p square wave at 100 Hz.
Handling Precautions
Although protection circuitry has been designed into this device, proper precautions should be taken to avoid exposure to elec-
trostatic discharge (ESD) during handling and mounting. Legerity employs a human-body model (HBM) and a charged-device
model (CDM) for ESD-susceptibility testing and protection design evaluation. ESD voltage thresholds are dependent on the
circuit parameters used to define the model. No industry-wide standard has been adopted for CDM. However, a standard HBM
(resistance = 1500Ω , capacitance = 100 pF) is widely used and therefore can be used for comparison purposes. The HBM ESD
threshold presented here was obtained by using these circuit parameters.
V
V
Ambient Temperature
BAT
DD
BAT
is used only as a reference for internal protection circuitry. If V
*
Supply
Operating Temperature Range
Storage Temperature Range
Relative Humidity Range
Pin Soldering Temperature (t=10s max)
5 V Power Supply
Battery Supply
Logic Input Voltage
Input-to-output Isolation
Pole-to-pole Isolation (All except SW6, SW8)
Pole-to-pole Isolation (Ringing Access Switch, SW8)
Pole-to-pole Isolation (Ringing Test Swtich, SW6)
ESD Immunity (Human Body Model)
Min
–19
4.5
Parameter
Zarlink Semiconductor Inc.
BAT
Typ
—
7
5
rises above typically –10 V, the device will enter an all OFF state and
−40° to 85°C
JESD22 Class 1C compliant
-0.3
Min
–40
–40
-0.3
—
—
—
—
—
—
5
V
DD
Max
150
260
–85
330
330
480
260
110
95
7
Max
+0.3
–72
5.5
Unit
°C
°C
°C
%
V
V
V
V
V
V
V
Unit
V
V