92hd71b5x5prgxb3x8 Integrated Device Technology, 92hd71b5x5prgxb3x8 Datasheet - Page 17

• Manufacturer Part Number: 92hd71b5x5prgxb3x8
• Description: Four Channel Hd Audio Codec, Low Power Optimized, 4-ports, 95db Snr
• Manufacturer: Integrated Device Technology

4-CHANNEL HD AUDIO CODECS OPTIMIZED FOR LOW POWER
0
1
2
3
4
Power State
D0
D1
D2
D3
D0-D3
92HD71B5
4-CHANNEL HD AUDIO CODECS OPTIMIZED FOR LOW POWER
Digital Mics
1.4.12. Digital Microphone Support
Yes
Yes
Yes
Yes
No
DMIC Widget
N/A
Single Edge
Double Edge on
either DMIC_0 or 1
OR
Single Edge on
DMIC_0 and 1
Double Edge on
one DMIC pin and
Single Edge on the
second DMIC pin.
Double Edge
Enabled?
Data Sample
The digital microphone interface permits connection of a digital microphone(s) to the CODEC via the
DMIC0, DMIC1, and DMIC_CLK 3-pin interface. The DMIC0 and DMIC1 signals are inputs that carry
individual channels of digital Mic data to the ADC. In the event that a single microphone is used, the
data is ported to both ADC channels.
The DMIC_CLK output is controllable from 4.704Mhz, 3.528Mhz, 2.352Mhz, 1.176Mhz and is syn-
chronous to the 24Mhz internal clock. The default frequency is 2.352Mhz.
92HD71B5 supports the following digital microphone configurations:
Clock Capable
Clock Disabled
Clock Disabled
Clock Disabled
Clock Disabled
Table 9. DMIC_CLK and DMIC_0,1 Operation During Power States
DMIC_CLK
Output
N/A
0, or 1
0, or 1
0, or 1
0, or 1
ADC Conn.
Table 8. Valid Digital Mic Configurations
Input Capable
Input Disabled
Input Disabled
Input Disabled
Input Disabled
DMIC_0,1
No Digital Microphones
Available on either DMIC_0 or DMIC_1
Both ADC Channels produce data, may be in phase or out by 1/2 DMIC_CLK
period depending upon external configuration and timing
Available on either DMIC_0 or DMIC_1, External logic required to support
sampling on a single Digital Mic pin channel on rising edge and second Digital Mic
right channel on falling edge of DMIC_CLK for those digital microphones that don’t
support alternative clock edge capability. If both DMIC_0 and DMIC_1 are used to
support 2 digital microphones, 2 separate ADC units will be used, however, this
configuration is not recommended since it consumes two stereo ADC resources.
Requires both DMIC_0 AND DMIC_1, External logic required to support sampling
on a single Digital Mic pin channel on rising edge and second Digital Mic right
channel on falling edge of DMIC_CLK for those digital microphones that don’t
support alternative clock edge capability. Two ADC units are required to support
this configuration
Connected to DMIC_0 and DMIC_1, External logic required to support sampling
on a single Digital Mic pin channel on rising edge and second Digital Mic right
channel on falling edge of DMIC_CLK for those digital microphones that don’t
support alternative clock edge capability. Two ADC units are required to support
this configuration
17
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1
Input Widget is Enabled. Otherwise, the DMIC_CLK remains Low
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1
Input Widget is Enabled. Otherwise, the DMIC_CLK remains Low
DMIC_CLK Remains Low
DMIC_CLK Remains Low
DMIC_CLK is HIGH-Z with Weak Pull-down
Notes
92HD71B5
Notes
PC AUDIO
V 1.0, 01/08