zl50110gag2 Zarlink Semiconductor, zl50110gag2 Datasheet - Page 40
zl50110gag2
Manufacturer Part Number
zl50110gag2
Description
1024 Channel 32 T1/e1, 2 T3/e3 Cesop Processor With Triple Ethernet Interface
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50110GAG2.pdf
(110 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ZL50110GAG2
Manufacturer:
ZARLINK
Quantity:
60
- Current page: 40 of 110
- Download datasheet (3Mb)
M2_RXER
M2_CRS
M2_TXCLK
M2_TXD[3:0]
M2_TXEN
M2_TXER
M3_LINKUP_LED
M3_ACTIVE_LED
Signal
Signal
Note: This port must not be used to receive data at the same time as port 3,
Note: This port must not be used to receive data at the same time as port 2,
Table 12 - MII Port 2 Interface Package Ball Definition (continued)
I/O
I/O
I D
I D
I U
O
O
O
O
O
Table 13 - MII Port 3 Interface Package Ball Definition
AC24
AC25
AD26
[3]
[2]
AC22
AB20
G24
AB26
MII Port 2 - ZL50111 and ZL50112 variants only.
AE25
AD23
MII Port 3 - ZL50111 variant only
Package Balls
Package Balls
they are mutually exclusive.
they are mutually exclusive.
ZL50110/11/12/14
Zarlink Semiconductor Inc.
[1]
[0]
40
AC21
AE24
Receive Error. Active high signal indicating
an error has been detected. Normally valid
when M2_RXDV is asserted. Can be used
in conjunction with M2_RXD when
M2_RXDV signal is de-asserted to indicate
a False Carrier.
Carrier Sense. This asynchronous signal is
asserted when either the transmission or
reception device is non-idle. It is active
high.
MII only - Transmit Clock
Accepts the following frequencies:
Transmit Data. Clocked on rising edge of
M2_TXCLK.
Transmit Enable. Asserted when the MAC
has data to transmit, synchronously to
M2_TXCLK with the first pre-amble of the
packet to be sent. Remains asserted until
the end of the packet transmission. Active
high.
Transmit Error. Transmitted synchronously
with respect to M2_TXCLK, and active high.
When asserted (with M2_TXEN also
asserted) the ZL50110/12 will transmit a
non-valid symbol, somewhere in the
transmitted frame.
LED drive for MAC 3 to indicate port is
linked up.
Logic 0 output = LED on
Logic 1 output = LED off
LED drive for MAC 3 to indicate port is
transmitting or receiving packet data.
Logic 0 output = LED on
Logic 1 output = LED off
25.0 MHz
MII
Description
Description
100 Mbps
Data Sheet
Related parts for zl50110gag2
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
128, 256 and 1024 Channel CESoP Processors
Manufacturer:
ZARLINK [Zarlink Semiconductor Inc]
Datasheet:
Part Number:
Description:
Zarlink Semiconductor Inc [TV IF PREAMPLIFIER]
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
256 x 256 Channels (8 TDM Streams @ 2.048Mb/s) Non-blocking Digital Switch (DX)
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
Video Programme Delivery Control Interface Circuit
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
SP8719520MHz LOW CURRENT TWO-MODULUS DIVIDERS
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
REMOTE CONTROL RECEIVER
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
2·5GHz ÷8192 PRESCALER
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
1·3GHz 4256 PRESCALER WITH LOW CURRENT AND LOW RADIATION
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
Manufacturer:
Zarlink Semiconductor
Datasheet:
Part Number:
Description:
Manufacturer:
Zarlink Semiconductor
Datasheet: