am79c930 Advanced Micro Devices, am79c930 Datasheet - Page 133
am79c930
Manufacturer Part Number
am79c930
Description
Pcnet-mobile Single-chip Wireless Lan Media Access Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C930.pdf
(161 pages)
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PCMCIA I/O READ ACCESS
Notes:
1. The max value for this parameter assumes the following worst case situation:
2. Parameter is not included in production test.
Parameter
Value
0
1
2
3
4
5
6
7
Symbol
tWTLWTH
tIGHRGH
tRGLIGL
tIGLWTL
tWTHQV
tIGLQNZ
tIGLIGH
tIGHIAH
tIGHEH
tIGHQX
tIGHQZ
tAVIGL
tIGHAX
tIGLIAL
tIGLQV
tELIGL
Worst Case
FLASH and SRAM wait states set at “3.”
Host performs PCMCIA WRITE cycle at same time that Am79C930 embedded 80188 controller begins
instruction fetch cycle to FLASH memory.
PCMCIA WRITE cycle is posted internal to Am79C930 device, pending the completion of the embedded 80188
controller access.
Host performs PCMCIA READ cycle immediately following completion of PCMCIA WRITE cycle.
After completion of first embedded 80188 access to FLASH, posted PCMCIA WRITE executes to SRAM;
PCMCIA READ stycle is being held in wait state.
After completion of posted ISA WRITE cycle, new embedded 80188 access to FLASH begins.
After completion of second embedded 80188 access to FLASH, PCMCIA READ cycle is allowed to proceed
onto memory bus to SRAM; host is still held in wait state.
At SRAM READ cycle completion, data is delivered to PCMCIA bus and wait state is exited.
Parameter Description
Address setup to IORD
Address hold from IORD
REG setup to IORD
REG hold from IORD
CE setup to IORD
CE hold from IORD
IORD width
INPACK
INPACK
WAIT
WAIT width
Data delay from WAIT
Data enabled from IORD
Data delay from IORD
Data hold from IORD
Data disabled from IORD
delay from IORD
delay from IORD
delay from IORD
P R E L I M I N A R Y
Am79C930
Test Conditions
Notes 1, 2
Note 2
Note 2
Min
165
70
20
20
5
0
5
0
0
0
53 X TCLKIN
Max
100
45
45
35
20
0
AMD
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
133
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