am79c850 Advanced Micro Devices, am79c850 Datasheet - Page 69
am79c850
Manufacturer Part Number
am79c850
Description
Supernet-r 3
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C850.pdf
(97 pages)
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SUPERNET 3 REGISTERS
SUPERNET 3 Programmable Registers
Mnemonic
“cmdreg1”
“cmdreg2”
Register
“stmchn”
“imsk1u”
“imsk2u”
“imsk1l”
“imsk2l”
“mod1”
“treq0”
“treq1”
“sagp”
“lagm”
“tmax”
“st1u”
“st2u”
“said”
“laim”
“lagc”
“mir1”
“mir0”
“tneg”
“tmrs”
“lagl”
“pri0”
“st1l”
“st2l”
“laic”
“lail”
“tvx”
“tht”
“trt”
NPADDR7–0
“00”
“01”
“00”
“01”
“02”
“03”
“04”
“05”
“06”
“07”
“08”
“09”
“0a”
“0b”
“0c”
“0d”
“0e”
“10”
“11”
“12”
“13”
“14”
“15”
“16”
“17”
“18”
“19”
“1a”
“1b”
“1c”
“0f”
Description
Load the Command register 1 instruction
Load the Command register 2 instruction
Upper 16 bits of status register 1 (Read Only)
Lower 16 bits of status register 1 (Read Only)
Upper 16 bits of status register 2 (Read Only)
Lower 16 bits of status register 2 (Read Only)
Upper 16 bits of IMSK register 1
Lower 16 bits of IMSK register 1
Upper 16 bits of IMSK register 2
Lower 16 bits of IMSK register 2
Short Address—individual
Long Address, individual (MSW of LAID)
Long Address, individual (middle of LAID)
Long Address, individual (LSW of LAID)
Short Address—group
Long Address, group (MSW of LAGP)
Long Address, group (middle of LAGP)
Long Address, group (LSW of LAGP)
Mode Register 1
State Machine register
Upper 16 bits—MAC information register (Read Only)
Lower 16 bits—MAC information register (Read Only)
TMAX register
TVX register
Upper 16 bits of TRT timer
Upper 16 bits of THT timer
Upper 16 bits of TNEG register
Lower 5 bits of TNEG, TRT, THT timers
Bit 14–10—Lower 5 bits of TNEG
Bit 9–5—Lower 5 bits of TRT
Bit 4–0—Lower THT timer
Bit 15 is the Late Count
Station’s LSW of requested TRT
Station’s MSW of requested TRT
Priority register for ASYNC0
P R E L I M I N A R Y
SUPERNET 3
AMD
69
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