s71pl512nd0 Meet Spansion Inc., s71pl512nd0 Datasheet - Page 43
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s71pl512nd0
Manufacturer Part Number
s71pl512nd0
Description
Two S29pl256n Devices 32 M X 16-bit Cmos 3.0-volt Only Simultaneous Read/write, Page-mode Flash Memory
Manufacturer
Meet Spansion Inc.
Datasheet
1.S71PL512ND0.pdf
(90 pages)
- Current page: 43 of 90
- Download datasheet (2Mb)
9.6
November 23, 2005 S29PL-N_M0_A4
Writing Commands/Command Sequences
During a write operation, the system must drive CE# and WE# to V
viding an address, command, and data. Addresses are latched on the last falling edge of WE# or
CE#, while data is latched on the 1st rising edge of WE# or CE#. An erase operation can erase
one sector, multiple sectors, or the entire device.
space that each sector occupies. The device address space is divided into four banks: Banks B
and C contain only 128 Kword sectors, while Banks A and D contain both 32 Kword boot sectors
in addition to 128 Kword sectors. A bank address is the set of address bits required to uniquely
select a bank. Similarly, a sector address is the address bits required to uniquely select a sector.
I
Characteristics
CC2
in
DC Characteristics
contains timing specification tables and timing diagrams for write operations.
P r e l i m i n a r y
S29PL-N MirrorBit™ Flash Family
represents the active current specification for the write mode. see
Table 8.1
and
Table 8.2
IL
and OE# to V
indicate the address
IH
when pro-
AC
41
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