txc-03453b TranSwitch Corporation, txc-03453b Datasheet - Page 46

• Manufacturer Part Number: txc-03453b
• Description: Tl3m Device Triple Level Mapper
• Manufacturer: TranSwitch Corporation

September 2003
TL3M
TXC-03453B
PRELIMINARY TXC-03453B-MB, Ed. 3
Note 1: RDY goes low when the address being read corresponds to a RAM location but remains high during status
A(9-0) address hold time after RD
A(9-0) address setup time before SEL
D(7-0) data valid delay after RDY
D(7-0) data float time after RD
RD pulse width
SEL setup time before RD
SEL hold time after RD
RDY delay after SEL
RDY delay after RD
RDY pulse width (See Note 1)
RDY float time after SEL
A (9-0)
D(7-0)
RDY
SEL
or control register access.
R
t
RD
PW(2)
CYC
is the period, in nanoseconds, of the RAM clock (RAMCI) (e.g., RAMCI @ 25MHz yields
= 1.92 s max).
Parameter
Figure 22. Intel Microprocessor Read Cycle Timing
t
SU(1)
t
D(2)
t
SU(2)
Symbol
DATA SHEET
t
t
t
t
PW(1)
PW(2)
t
SU(1)
t
SU(2)
t
t
t
t
t
t
H(1)
D(1)
F(1)
H(2)
D(2)
D(3)
F(2)
D(3)
- 46 of 96 -
t
PW(2)
40.0
10.0
Min
t
4.0
0.0
0.0
0.0
PW(1)
t
D(1)
Typ
t
H(1)
t
H(2)
t
F(1)
48 * Rcyc
Max
13.0
13.0
16.0
14.0
12.5
t
F(2)
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s