emc2103-3-kp-tr Standard Microsystems Corp., emc2103-3-kp-tr Datasheet - Page 48

• Manufacturer Part Number: emc2103-3-kp-tr
• Description: Emc2103 Rpm-based Fan Controller With Hardware Thermal Shutdown
• Manufacturer: Standard Microsystems Corp.

APPLICATION NOTE: When the APD diode is enabled, there will be a delay of a full temperature update before
Revision 0.88 (06-30-08)
6.10
ADDR
20h
R/W
R/W
The Configuration Register controls the basic functionality of the EMC2103. The bits are described
below.
Bit 7 - MASK - Blocks the ALERT pin from being asserted.
Bit 3 - SYS3 (EMC2103-2 only) - Enables the high temperature limit for the External Diode 3 channel
to trigger the Critical / Thermal Shutdown circuitry (see
Bit 2 - SYS2 (EMC2103-2 only) - Enables the high temperature limit for the External Diode 2 channel
to trigger the Critical / Thermal Shutdown circuitry (see
Bit 1 - SYS1 - Enables the high temperature limit for the External Diode 1 channel to trigger the Critical
/ Thermal Shutdown circuitry (see
Bit 0 - APD (EMC2103-2 only) - This bit enables the Anti-parallel diode functionality on the External
Diode 3 pins (DP3 and DN3).
The Configuration Register is software locked.
Configuration Register
‘0’ (default) - The ALERT pin is unmasked. If any bit in either status register is set, the ALERT pin
will be asserted (unless individually masked via the Mask Register)
‘1’ - The ALERT pin is masked and will not be asserted.
‘0’ (default) - the External Diode 3 channel high limit will not be linked to the SYS_SHDN pin. If the
temperature meets or exceeds the limit, the ALERT pin will be asserted normally.
‘1’ - the External Diode 3 channel high limit will be linked to the SYS_SHDN pin. If the temperature
meets or exceeds the limit then the SYS_SHDN pin will be asserted. The SYS_SHDN# pin will be
released when the temperature drops below the high limit. The ALERT pin will be asserted
normally.
‘0’ (default) - the External Diode 2 channel high limit will not be linked to the SYS_SHDN pin. If the
temperature meets or exceeds the limit, the ALERT pin will be asserted normally.
‘1’ - the External Diode 2 channel high limit will be linked to the SYS_SHDN pin. If the temperature
meets or exceeds the limit then the SYS_SHDN pin will be asserted. The ALERT pin will be
asserted normally.
‘0’ (default) - The External Diode 1 channel high limit will not be linked to the SYS_SHDN pin. If
the temperature meets or exceeds the limit, the ALERT pin will be asserted normally.
‘1’ - The External Diode 1 channel high limit will be linked to the SYS_SHDN pin. If the temperature
meets or exceeds the limit then the SYS_SHDN pin will be asserted. The ALERT pin will be
asserted normally.
‘0’ (default) - The Anti-parallel diode functionality is disabled. The External Diode 2 channel can be
configured for any type of diode
‘1’ - The Anti-parallel diode functionality is enabled. Both the External Diode 2 and 3 channels are
configured to support a diode or diode connected transistor (such as a 2N3904).
Configuration
REGISTER
any comparisons and functionality associated with the External Diode 3 channel will be
implemented. This includes the SYS3 bit operation, limit comparisons, and look up table
comparisons.
MASK
B7
Table 6.15 Configuration Register
-
B6
Section
DATASHEET
-
B5
48
5.1).
-
B4
SYS3
RPM-Based Fan Controller with HW Thermal Shutdown
B3
Section
Section
SYS2
B2
5.1).
5.1).
SYS1
B1
APD
B0
SMSC EMC2103
DEFAULT
Datasheet
00h