hi-8590 Holt Integrated Circuits, Inc., hi-8590 Datasheet - Page 3

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hi-8590

Manufacturer Part Number
hi-8590
Description
Arinc Line Driver Dual Receiver
Manufacturer
Holt Integrated Circuits, Inc.
Datasheet
FUNCTIONAL DESCRIPTION (cont.)
APPLICATION INFORMATION
Figure 3 shows a possible application of the
HI-8590 interfacing both the ARINC transmit
and receive channels of a HI-6010 which in
turn interfaces to an 8-bit microprocessor bus.
RECEIVER
Figure 2 shows the general architecture of the ARINC 429
receiver. The receiver operates off the VCC supply only.
The inputs RINA and RINB each have series resistors, typi-
cally 35K ohms. They connect to level translators whose
resistance to Ground is typically 10K ohms. Therefore, any
series resistance added to the inputs will affect the voltage
translation.
After level translation, the inputs are buffered and become
inputs to a differential amplifier. The amplitude of the dif-
ferential signal is compared to levels derived from a di-
vider between VCC and Ground. The nominal settings cor-
respond to a One/Zero amplitude of 6.0V and a Null ampli-
tude of 3.3V.
RINA
RINB
TRANSLATION
PROTECTION
ESD
AND
FIGURE 2 - RECEIVER BLOCK DIAGRAM
HOLT INTEGRATED CIRCUITS
DRIVE FROM LOGIC
HARDWIRE
HI-8590
OR
ZERO
NULL
NULL
ONE
3
FIGURE 3 - APPLICATION DIAGRAM
The status of the ARINC receiver input is latched. A Null
input resets the latches and a One or Zero input sets the
latches.
The logic at the output is controlled by the test signal
which is generated by the logical OR of the TESTA and
TESTB pins.
TESTA and TESTB are a logic One.
ì
í
î
S
LATCH
R
S
LATCH
R
14
15
12
13
Q
2
6
5
Q
9
HI-8590
The receiver output pins float if both
16
TEST
TEST
TESTA
TEST
TEST
TESTB
8
1
4
3
11
10
HI-6010
TESTA ' TESTB
TESTA ' TESTB
ROUTA
ROUTB

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