am42dl3224gt71it Meet Spansion Inc., am42dl3224gt71it Datasheet - Page 24

• Manufacturer Part Number: am42dl3224gt71it
• Description: Stacked Multi-chip Package Mcp Flash Memory And Sram 32 Megabit 4 M X 8-bit/2 M X 16-bit Cmos 3.0 Volt-only, Simultaneous Operation Flash Memory And 4 Mbit 256 K X 16-bit Static Ram
• Manufacturer: Meet Spansion Inc.

Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to Tables 14 and 16
for command definitions). In addition, the following
hardware data protection measures prevent accidental
erasure or programming, which might otherwise be
caused by spurious system level signals during V
power-up and power-down transitions, or from system
noise.
Low V
When V
cept any write cycles. This protects data during V
power-up and power-down. The command register
and all internal program/erase circuits are disabled,
and the device resets to reading array data. Subse-
quent writes are ignored until V
The system must provide the proper signals to the
control pins to prevent unintentional writes when V
is greater than V
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE#f
or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
CE#f and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE#f = V
the device does not accept commands on the rising
24
IL
(Word Mode)
, CE#f = V
Addresses
1Ah
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
CC
CC
Write Inhibit
is less than V
IH
or WE# = V
LKO
(Byte Mode)
IL
Addresses
.
and OE# = V
2Ah
2Ch
2Eh
20h
22h
24h
26h
28h
30h
32h
34h
LKO
IH
, the device does not ac-
. To initiate a write cycle,
CC
is greater than V
IH
Table 10. CFI Query Identification String
during power up,
0051h
0052h
0059h
0002h
0000h
0040h
0000h
0000h
0000h
0000h
0000h
Data
P R E L I M I N A R Y
Am42DL32x4G
Query Unique ASCII string “QRY”
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set (00h = none exists)
Address for Alternate OEM Extended Table (00h = none exists)
LKO
CC
CC
CC
.
edge of WE#. The internal state machine is automati-
cally reset to reading array data on power-up.
COMMON FLASH MEMORY INTERFACE
(CFI)
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
handshake, which allows specific vendor-specified
software algorithms to be used for entire families of
devices. Software support can then be device-inde-
pendent, JEDEC ID-independent, and forward- and
backward-compatible for the specified flash device
families. Flash vendors can standardize their existing
interfaces for long-term compatibility.
This device enters the CFI Query mode when the sys-
tem writes the CFI Query command, 98h, to address
55h in word mode (or address AAh in byte mode), any
time the device is ready to read array data. The sys-
tem can read CFI information at the addresses given
in Tables 10–13. To terminate reading CFI data, the
system must write the reset command. The CFI Query
mode is not accessible when the device is executing
an Embedded Program or embedded erase algorithm.
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
CFI data at the addresses given in Tables 10–13. The
system must write the reset command to return the de-
vice to reading array data.
For further information, please refer to the CFI Specifi-
cation and CFI Publication 100, available via the
World Wide Web at http://www.amd.com/flash/cfi. Al-
ternatively, contact an AMD representative for copies
of these documents.
Description
May 19, 2003