lrs1302 Sharp Microelectronics of the Americas, lrs1302 Datasheet - Page 20

• Manufacturer Part Number: lrs1302
• Description: 8m Flash And 1m Sram
• Manufacturer: Sharp Microelectronics of the Americas

When the block erase is complete,
SR.5 should
detected,
system software attempts
remains
command
This two-step command
by execution
accidentally
sequence will result in both status register bits SR.4
and SR.5 being set to “1”. Also, reliable block erasure
can only occur when Vcc=VccI
absence of this
protected
while
Successful block erase requires that the corresponding
block lock-bit
block
block lock-bit is set and m=V,,,
set to “1”. Block erase operations
produce spurious results and should not be attempted.
4.6 Byte Write Command
Byte
sequence. Byte write setup (standard
10H) is written,
specifies the address and data (latched on the rising
edge of WE). The WSM then takes over, controlling
byte
the byte
automatically
[see Figure 5). The CPU can detect the completion
the byte write event by analyzing
3R.7.
When byte write is complete,
should be checked. If byte write error is detected, the
status register should
verify
juccessfully
jtatus
:ommand.
&liable
md Vpp=Vppw
nemory
>yte write
write and write verify algorithms
write
Vppflppm,
erase is attempted
SHARP
only
register
byte writes can only occur when V,c=VccI
contents are protected
in read status register
the status register should be cleared before
against erasure. If block erase is attempted
is issued.
write
is attempted
erased. An invalid
is executed
write to “0”s. The GUI remains
detects
be checked.
outputs
be cleared or, if set, that m=V,.
ensures
In the absence of this high voltage,
mode
sequence
high
followed
SR.3 and SR5 will be set to “1”.
errors
status register data when read
be cleared. The internal
that block
voltage,
until
sequence of set-up followed
by a two-cycle
corrective
while
If a block
when
by a second
is written,
for
status register bit SR.4
against byte writes. If
Block Erase command
it
and V,=V,,,.
SR.1 and SR5 wi.lI be
block
mode
VpplVppm,
with V,<pcV,
“1% that
the corresponding
receives
status register bit
status register bit
contents
actions. The CLJI
40H or alternate
internally.
erase error is
contents
until
the device
write that
command
do not
another
are not
in read
a new
status
WSM
In the
LRS13023
After
the
are
of
If
block
have completed.
written
SR7 will automatically
command
status register data when read (see Figure 6). VP, must
remain
erase) while block erase is suspended.
remain
write operations
be set to “1”). Specification
At this point, a Read Arraycomman
read
suspended.
be issued during
other blocks. Using the Byte Write Suspend command
(see Section 4.81,. a..byte write operation
suspended.
erase suspended,
“0” . However,
erase suspend status.
The only other valid commands
suspended
Resume.
the block erase process. Status register bits SR.6 and
byte
4.7 Block Erase Suspend Command
The Block Erase Suspend command
interruption
block of memory.
writing
that the WSM suspend the block erase sequence at a
predetermined
outputs status register data when read after the Block
Erase Suspend
register
block erase operation
erase suspend latency.
register bits SR3 and SR4 will be set to “1”. Successful
lock-bit be cleared or, if set, that i@=V,.
is attempted
set and RP=V,,,
write operations
results and should not be attempted.
write
data from
erase). Block erase cannot resume
at VP,,
to the flash memory,
at VI,
-
the Block Erase Suspend command
bits SR.7 and SR.6 can determine
After
is written,
are Read Status Register and Block Erase
A Byte:Write
During-a
requires
when the corresponding
to read or byte-write
SR.6 will remain
or V,
a Block Erase Resume
point
command
(the
initiated
with VI,<m<V,,
SR.l and SR4 will be set to “1”. Byte
status registerbit
blocks
Once the block-erase
erase suspend to program
the device automatically
byte write operation
same
has been suspended
that the corresponding
in the algorithm.
I
clear . After the Erase Resume
(the same m
comman d sequence can also
during block erase suspend
other
is written.
Vpp level used for block
tw-
I
the WSM will continue
than
“1” to indicate block
while block erase is
SR7 will return to
d can be written to
.%
allows block-erase
produce spurious
defines the block
data in another
block lock-bit is
that which
level used for
Polling
m must also
process starts,
command
If byte write
can also. be
The device
with block
until
(both will
when the
requests
outputs
data. in
status
block
byte
18
is
is