lrs1302 Sharp Microelectronics of the Americas, lrs1302 Datasheet - Page 6
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lrs1302
Manufacturer Part Number
lrs1302
Description
8m Flash And 1m Sram
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LRS1302.pdf
(61 pages)
SHARI=
3. Notes
POWER UP SEQUENCE
DEVICE DECOUPLING
POWER SUPPLY AND CHIP ENABLE
SUPPLY POWER
SRAM DATA RETENTION
in standby mode when the other is active. A careful decoupling of power supplies is necessary between
SRAM and Flash Memory. Note peak current caused by transition of control signals.
voltage from
13 1,072 X 8 bit SRAM are assembled into.
battery and a backup battery needs careful
supply voltage or of control si{nals (F-B, F-?% and RP).
together, possibly they may not operate normally by interference noises or data collision on I/O bus.
SRAM data retention mode.
LOW for more than 1OOnsec.
Maximum difference (between F-V,
This product is a stacked TSOP package that a 1,048,576X 8 bit Flash Memory and a
It is forbidden that both F-E
Both F-V,
CASE I: FLASH MEMORY IS IN STANDBY MODE. (F-Vcc=2.7V to 3.6V)
CASE 2: FLASH MEMORY IS IN DEEP POWER DOWN MODE. (F-Vcc=2.7V to 3.6V)
CASE 3: FLASH MEMORY POWER SUPPLY IS TURNED OFF. (F-VcpOV)
The power supply is needed to be designed carefully because one of the SRAM and the Flash Memory is
SRAM data retention is capable in three ways as below. SRAM power switching between a system
When turning on Flash memory power supply, keep i@ LOW. After F-V,, reaches over 2.7V, keep RP
* Flash Memory inputs and input/outputs except F-eand
* SRAM inputs and input/outputs except S-mare needed to be applied wilh voltages in the range of
* Flash Memory inputs and input/outputs except mare needed to be applied with voltages in the range of
* Fix-
* SRAM inputs and input/outputs except S-mare needed to be applied with voltages in the range of
- Flash Memory inputs and input/outputs except mare needed to be at GND or to be open(High-Z).
* SRAM inputs and input/outputs except S-mare needed to be applied with voltages in the range of
the range of -0.3V to S-V,,+O.3V or to be open(High-Z).
-0.3V to S-V,c+O.3V or to be open.
-0.3V to S-Vc,+O.3V or to be open(High-Z). RP is needed to be at the same level as F-V,, or to be
open.
-0.3V to S-V,c+O.3V or to be open(High-Z).
-0.3V to S-Vcc+O.3V or to be open(High-Z).
LOW level before turning off Flash memory power supply.
failing
and S-V,
The contents described in Part 1 take first priority over Part 2 and Part 3.
lower han
are needed to be applied by the recommended supply voltage at the same time except
2.OV by a Flash Memory peak current caused by transition of Flash Memory
and S-E
and S-V,
OF FLASH MEMORY
device
should be LOW simultaneously.
LRS13023
decoupling from Flash Memory to prevent SRAM
) of the voltage is less than -0.3V.
Gare needed to be applied with voltages in
AND SRAM
If the two memories are active
supply
4